Hostname: page-component-7b7567c8c-fvjsw Total loading time: 0 Render date: 2026-11-15T21:40:36.476Z Has data issue: false hasContentIssue false
  • English
  • Français

Appropriate passivation structure in dynamic random access memory devices to improve stress-related reliability performance after plastic packaging

Published online by Cambridge University Press:  31 January 2011

Seong-Min Lee
Seong-Min Lee
Affiliation:
Department of Materials Science & Engineering, University of Inchon, 177 Dohwa-dong, Nam-Ku, Inchon 402-749, South Korea
Get access

Extract

This work attempts to determine an appropriate passivation structure in the real integrated circuit (IC) pattern to improve stress-related reliability problems after the plastic packaging. Several different types of amorphous passivation materials were first tested to learn how effectively they protect underlying Al interconnection lines during thermal displacement-induced fatigue at temperature ranges from −65 °C to 150 °C. It was also studied how effectively the occurrence of cracking in a passivation layer can be suppressed by the improvement of its topological feature or increase in its thickness. According to the experimental results, an increase in passivation thickness up to 21,000 Å (7000 Å for oxide and 14,000 Å for SiN, respectively) was found to be a highly effective way to suppress stress-induced passivation damage on the inside of the chip in plastic IC packages. However, at the edges of the chip, smoothing of the passivation layer by a sloping metal sidewall was more important for the improvement of thermal cycling performance than thickening of the passivation layer.

Information

Type
Articles
Information
Journal of Materials Research , Volume 13 , Issue 7 , July 1998, pp. 1967 - 1973
Copyright
Copyright © Materials Research Society 1998

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

Article purchase

Temporarily unavailable

References

1.Claassen, W. A. P., Pol, H. A. J. Th. v. d., and Goemans, A. H., J. Electrochem. Soc.: Solid-State Sci. Technol. 133, 1458 (1986).CrossRefGoogle Scholar
2.Flinn, P. A., in Thin Films: Stresses and Mechanical Properties II, edited by Doerner, M. F., Oliver, W. C., Pharr, G. M., and Brotzen, F. R. (Mater. Res. Soc. Symp. Proc. 188, Pittsburgh, PA, 1990), p. 3.Google Scholar
3.Sauter, A. I. and Nix, W. D., in Thin Films: Stresses and Mechanical Properties II, edited by Doerner, M. F., Oliver, W. C., Pharr, G. M., and Brotzen, F. R. (Mater. Res. Soc. Symp. Proc. 188, Pittsburgh, PA, 1990), p. 15.Google Scholar
4.Okikawa, S. et al., The International Society for Testing and Failure Analysis Meeting, Los Angeles, CA, Oct. (1983).Google Scholar
5.Nishimura, A., Kawai, S., and Murakami, G., IEEE Trans. on CHMT 12, 639 (1989).Google Scholar
6.Suhir, E., Proc. 37th Electronics Components Conference, IEEE/(EIA) (1987), p. 508Google Scholar
7.Groothius, S. W. and Murtuza, M., Proc. 23rd Annual Int. Reliability Symposium, IEEE (1985), p. 184.Google Scholar
8.Edwards, D., Heinen, K. G., Martines, S. K., and Martines, J. E., IEEE Trans. Components, Hybrids, and Manufacturing Technology, CHMT-12 (4) (1987).Google Scholar
9.Klema, J., Pyle, R., and Domangue, E., 22nd Annual Proceedings of Reliability Physics, IEEE Cat. 84 (CH1990-1), 1 (1984).Google Scholar
10.Abraham, T., Proceedings 4th Intl. IEEE VMIC Conf., Santa Clara, CA (1987), p. 115.Google Scholar
11.Lee, S. M., Lee, J. H., Oh, S. Y., and Chung, H. K., Proceedings 45th IEEE/ECTC, Las Vegas, NV (1995), p. 455.Google Scholar