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Optimal thickness for Si interlayer as diffusion barrier at the Si3N4/GaAs interface: A transmission electron microscopy study

Published online by Cambridge University Press:  03 March 2011

T. Zheng,
J.M. Gibson,
D.S.L. Mui and
H. Morkoç
T. Zheng
Affiliation:
Department of Physics, and Materials Research Laboratory, University of Illinois at Urbana-Champaign, Urbana, Illinois 61801-3080
J.M. Gibson
Affiliation:
Department of Physics, and Materials Research Laboratory, University of Illinois at Urbana-Champaign, Urbana, Illinois 61801-3080
D.S.L. Mui
Affiliation:
Science Engineering Laboratory, and Materials Research Laboratory, University of Illinois at Urbana-Champaign, Urbana, Illinois 61801-3080
H. Morkoç
Affiliation:
Science Engineering Laboratory, and Materials Research Laboratory, University of Illinois at Urbana-Champaign, Urbana, Illinois 61801-3080
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Abstract

Using transmission electron microscopy, we investigate Si3N4 grown in situ on GaAs metal-insulator-semiconductor (MIS) device structures with a Si interlayer, which has been previously shown to improve the electrical properties of field-effect transistors with Si3N4 gates on GaAs. We find that the primary role of the Si interlayer is to prevent the reaction between the nitride or nitrogen used for growth and GaAs. The interlayer thickness dependence of this microstructure, and its relationship to electrical properties, are discussed. The optimal thickness of the thin pseudomorphic Si interlayer appears to be around 0.4 nm. The growth temperature dependence of the critical thickness for morphological instability is demonstrated.

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Type
Articles
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Journal of Materials Research , Volume 10 , Issue 5 , May 1995, pp. 1126 - 1133
Copyright
Copyright © Materials Research Society 1995

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References

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