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200. mm Silicon Wafer-to-Wafer Bonding with Thin Ti Layer under BEOL-Compatible Process Conditions

Published online by Cambridge University Press:  01 February 2011

J. Yu,
J. J. McMahon,
J.-Q. Lu and
R. J. Gutmann
J. Yu
Affiliation:
Focus Center – New York, Rensselaer: Interconnections for Hyperintegration, Rensselaer Polytechnic Institute, Troy, New York 12180
J. J. McMahon
Affiliation:
Focus Center – New York, Rensselaer: Interconnections for Hyperintegration, Rensselaer Polytechnic Institute, Troy, New York 12180
J.-Q. Lu
Affiliation:
Focus Center – New York, Rensselaer: Interconnections for Hyperintegration, Rensselaer Polytechnic Institute, Troy, New York 12180
R. J. Gutmann
Affiliation:
Focus Center – New York, Rensselaer: Interconnections for Hyperintegration, Rensselaer Polytechnic Institute, Troy, New York 12180
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Abstract

Wafer level monolithic three-dimensional (3D) integration is an emerging technology to realize enhanced performance and functionality with reduced form-factor and manufacturing cost. The cornerstone for this 3D processing technology is full-wafer bonding under back-end-of-the-line (BEOL) compatible process conditions. For the first time to our knowledge, we demonstrate nearly void-free 200 mm wafer-to-wafer bonding with an ultra-thin Ti adhesive coating, annealed at BEOL-compatible temperature (400 °C) in vacuum with external pressure applied. Mechanical integrity test showed that bonded wafer pair survived after a stringent three-step thinning process (grinding/polishing/wet-etching) with complete removal of top Si wafer, while allowing optical inspection of bonding interface. Mechanisms contributing to the strong bonding at Ti/Si interface are briefly discussed.

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References

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