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3-D Integration Latest Developments at LETI

Published online by Cambridge University Press:  26 February 2011

Barbara Charlet
Barbara Charlet*
Affiliation:
barbara.charlet@cea.fr, CEA, LETI/DIHS, 17, rue des Martyrs, Grenoble, 38054, France, +33438784757, +33438782434
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Abstract

We review the latest 3-D integration developments performed in LETI, giving some devices integration examples and discussing the achieved performances. Direct bonding and layer transfer (smart cut™) is now largely used to process innovative substrates like: SOI, SSOI, GeOI, … and others. This type of new substrate can play a crucial role in 3D structure integration and can answer the requirements for new challenging performances.

3-D integration approach has been used and will be presented in the following topics: advanced packaging by neo-wafers, chip to wafers integration, hetero-structures integration and wafer to wafer concept (front and back-end application). The examples of neo-wafer rebuilding for advanced packaging, the hetero- structure achieved by chip-to-wafer or wafer-to-wafer bonding and front-end and back-end architecture are discussed regarding the 3-D integration challenging requirements. The challenging cases of wafer-level integrated demonstrators for high density 3D inter-chips connections and wireless interconnections are presented. For some examples we give also the first electrical performances achieved with representative demonstrators.

Keywords

microelectronicspackagingmicrostructure

Information

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 970: Symposium Y – Enabling Technologies for 3-D Integration , 2006, 0970-Y01-05
Copyright
Copyright © Materials Research Society 2007

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References

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