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Epitaxial Alignment of as Implanted Polysilicon Emitters

Published online by Cambridge University Press:  28 February 2011

J.L. Hoyt
Affiliation:
Stanford Electronics Laboratories, Stanford, CA 94305
E.F. Crabbé
Affiliation:
Stanford Electronics Laboratories, Stanford, CA 94305
J.F. Gibbons
Affiliation:
Stanford Electronics Laboratories, Stanford, CA 94305
R.F.W. Pease
Affiliation:
Stanford Electronics Laboratories, Stanford, CA 94305
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Abstract

We demonstrate a clear advantage for high-temperature, short time annealing to induce intentional, complete epitaxial alignment of arsenic implanted, 0.5 μm-thick polysilicon films on (100) silicon, while minimizing arsenic outdiffusion into the substrate. Using MeV ion channeling and cross-sectional electron microscopy, epitaxial alignment was studied in the 1050-1150 °C temperature range, for arsenic doping concentrations between 1 and 10 × 1020 cm−3. The alignment efficiency increases dramatically with chemical arsenic concentration in this range. An arsenic concentration of 1020 cm−3 yields alignment behavior which proceeds from the polysilicon/single-crystal interface. Between 1 and 5 × 1020 cm×3, the random grain growth can exceed the rate of alignment, and large grain, highly oriented polycrystalline films can result from the RTA. For 0.5 μm-thick polysilicon films with an average doping of 1021 cm×3, the rate of achievement of a high degree of epitaxial alignment exceeds the rate of arsenic penetration into the substrate at temperatures ≥ 1150 °C.

Bipolar transistors with 0.5 μm-thick emitter contacts and polysilicon dopings of 5 and 10 × 1020 cm×3 show less variation in base current when subjected to RTA (T ≥ 1100 °C) compared to devices annealed in a furnace in the 900 to 1000 °C range, while retaining the advantage over metal contacts.

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