Hostname: page-component-7b7567c8c-7pwfn Total loading time: 0 Render date: 2026-11-14T21:57:15.859Z Has data issue: false hasContentIssue false

Mechanical Interconnects to Silicon Integrated Circuits

Published online by Cambridge University Press:  21 February 2011

Charles A. Steidel*
Affiliation:
Intel Corporation, 145 S. 79th Street, Chandler, AZ 85226
Get access

Abstract

There are three predominant interconnection technologies in use today for silicon integrated circuits: wire bonding; TAB (tape automated bonding); and C4 (controlled collapse chip connection). This paper briefly reviews each of these technologies for their strengths and weaknesses but focuses especially on wire bonding for single chip VLSI applications.

Although wire bonding has been in widespread use ever since the invention of the small scale integrated circuit, the technique is still applicable for today's much larger and denser chips. With leadcounts up to 250 or even higher, many challenges are presented for equipment accuracy and speed and in package design, where novel techniques often are required to prevent the package from being the limiting factor in chip interconnection. These challenges are discussed in some detail.

The paper concludes with a discussion of the future direction for mechanical connections as influenced by the technical and cost requirements of both the chip and the system in which it resides.

Information

Type
Research Article
Copyright
Copyright © Materials Research Society 1988

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

Article purchase

Temporarily unavailable