Hostname: page-component-7b7567c8c-2n9c9 Total loading time: 0 Render date: 2026-11-15T21:56:28.008Z Has data issue: false hasContentIssue false

Polysilicon/Silicon Interfaces: Effect of Processing Parameters on Physical and Electrical Properties

Published online by Cambridge University Press:  03 September 2012

K. Srikrishna
Affiliation:
Technology Development, National Semiconductor Corporation, Santa Clara CA 95051.
M. Moinpour
Affiliation:
Technology Development, National Semiconductor Corporation, Santa Clara CA 95051.
B. Landau
Affiliation:
Technology Development, National Semiconductor Corporation, Santa Clara CA 95051.
Get access

Abstract

An arsenic doped polysilicon emitter structure is widely used as an important technology for high speed BiPolar and BiCMOS VLSI devices. The electrical behavior of such emitters is dictated to a large degree by the structure of the polysilicon/silicon interface and the extent of any interfacial oxide. In particular the contact resistance of n+ and p+ diffused regions of the polysilicon is sensitive to the interfacial structure. The microstructure of the polysilicon, in addition to the interface, dictates the junction depth and electrical properties and is determined by the deposition conditions and subsequent doping and annealing processes. The interface itself is defined largely by the cleaning procedure and the initial stages of the deposition process. In this paper we report the effects of process variables, such as deposition temperature, doping and annealing times and temperatures and pre-cleans on the microstructure and electrical properties of poly-emitters.

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

Article purchase

Temporarily unavailable