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Rapid Thermal Processing for Self-Aligned Silicide Technology

Published online by Cambridge University Press:  28 February 2011

Y. H. Ku,
S. K. Lee,
E. Louis,
D. K. Shih and
D. L. Kwong
Y. H. Ku
Affiliation:
Microelectronics Research Center, Department of Electrical and Computer Engineering,The University of Texas at Austin, Austin, Texas 78712
S. K. Lee
Affiliation:
Microelectronics Research Center, Department of Electrical and Computer Engineering,The University of Texas at Austin, Austin, Texas 78712
E. Louis
Affiliation:
Microelectronics Research Center, Department of Electrical and Computer Engineering,The University of Texas at Austin, Austin, Texas 78712
D. K. Shih
Affiliation:
Microelectronics Research Center, Department of Electrical and Computer Engineering,The University of Texas at Austin, Austin, Texas 78712
D. L. Kwong
Affiliation:
Microelectronics Research Center, Department of Electrical and Computer Engineering,The University of Texas at Austin, Austin, Texas 78712
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Abstract

A self-aligned titanium silicide process which combines the use of ion-beam mixing and rapid thermal processing (RTP) has been developed for CMOS VLSI applications. Shallow silicided junctions are formed by implanting dopants into silicide layers previously formed by ion-beam mixing with Si ions and low temperature annealing, and the subsequent drive-in of the implanted ions into the Si substrate during high temperature RTP. In addition, the formation of TiN on TiSi2 is achieved simultaneously during this process as a diffusion barrier for Al metallization. Short-channel MOS transistors with SALICIDE structure have been successfully fabricated and tested. Results of the impurity diffusion in silicide layer, the impurity segregation at both silicide/Si and oxide/silicide interfaces, contact stabilit of Al/TiN/TiSi2 structure, and device characteristics will be reported. Issues related to this process and its application to submicron device fabrication are discussed and foreseeable problem areas identified.

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References

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