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Slurry Development For Cu/Ultra Low k CMP

Published online by Cambridge University Press:  01 February 2011

Hugh Li,
Matt VanHaneham and
John Quanci
Hugh Li
Affiliation:
Rodel, Inc.
Matt VanHaneham
Affiliation:
Rodel, Inc.
John Quanci
Affiliation:
Rodel, Inc.
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Extract

Conventional CMP for Cu/Ultra-low k (k<2.4) integration faces significant technical challenges [1-2]. The majority of ULK materials are made porous to reduce the dielectric constant, while trading off on the mechanical strength [3-6]. With diminished hardness, elasticity and adhesion, the CMP process has to be “kinder and gentler”: lower down force, lower relative velocity, softer pad, and slurry with lower abrasive content [1,7]. In a word, the mechanical portion of the planarization process would be greatly reduced. To maintain the same performance, one has to rely on the chemical reactions to make Cu/ULK CMP a viable process.

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Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 767: Symposium F – Chemical-Mechanical Planarization , 2003, F5.3
Copyright
Copyright © Materials Research Society 2003

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References

1. Bajaj, R., Zutshi, A., Surana, R., Naik, M., and Pan, T., Integration Challenges for CMP of Copper, MRS Bulletin, Oct. 2002, p.776 Google Scholar
2. Babu, S.V., Cadien, K.C., and Yano, H., eds., Chemical-Mechanical Polishing 2001—Advances and Future Challenges, MRS Symp. Proc., 2001, p.671 Google Scholar
3. Bremmer, J., A new class of insulating materials: Emergence of ultralow-k, Solid State Tech., Sept. 2001 Google Scholar
4. Mosig, K., Jacobs, T., Brennan, K., Rasco, M., Wolf, J., Augur, R., Integration challenges of porous ultra low-k spin-on dielectrics, Microelec. Eng. 64, 2002 p.11 Google Scholar
5. Mosig, K., Cox, H., Klawuhn, E., Felipe, T. Suwwan de, Shiota, A., Integration of porous ultra low-k dielectric with CVD barriers, IEDM Proc. 2001, IEEE, Piscataway, 2001, p. 88–91 Google Scholar
6. Hiroi, M., Tada, M., Ohtake, H., Saito, S., Onodera, T., Furutake, N., Hayashi, Y., Dual hard mask process for low-k porous organosilica dielectric in copper dual damascene interconnnect fabrication, IITC Proc. 2001, IEEE, Piscataway, 2001, p. 295–297 Google Scholar
7. Bielmann, M., Mahajan, U., Singh, R.K., Agarwal, P., Mischler, S., Rosset, E., and Landolt, D., Chemical-Mechanical Polishing: Fundamentals and Challenges, edited by Babu, S.V., Danyluk, S., Krishnan, M., and Tsujimura, M., MRS Symp. Proc., 2000, p. 97 Google Scholar
8. Ye, Q., Quanci, J., Vanhanehem, M., Thomas, T., Integrated CMP Barrier Slurry Development To Achieve Adjustable Rate Selectivities, 7th CMP-MIC Proc. 2002 Google Scholar
9. Ye, Q., Quanci, J., Vanhanehem, M., Lavoie, R., CMP Barrier Slurry Development For Technology Nodes Beyond 0.13 μm, 8th CMP-MIC Proc. 2003 Google Scholar
10. International Technology Roadmap of Semiconductors; ITRS Home Page, http://public.itrs.net/Files/2002Update/Home.pdfGoogle Scholar
11. Steigerwald, J. Murarka, S. and Gutmann, R.J., Chemical Mechanical Planarization of Microelectronic Materials, John Wiley & Sons, New York, 1997, Chapter 7 Copper CMP, p.209 Google Scholar
12. Gray, W.D., Loboda, M.J., New barrier layers can help Cu/low-k integration, Solid State Technology, March 2002, p. 37 Google Scholar
13. Wang, D. H., Chiao, S., Afnan, M., Yih, P., Rehayem, M., Stress-free polishing advances copper integration with ultralow-k dielectrics, Solid State Tech., Oct., 2001 Google Scholar