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A Two-Step, Lightly Nitrided Gate Oxidation Process For Sub-0.5 μm Cmos Technology

Published online by Cambridge University Press:  15 February 2011

P. K. Roy,
Y. Ma and
M. T. Flemming
P. K. Roy
Affiliation:
Bell Laboratories, Lucent Technologies, Orlando, FL 32819
Y. Ma
Affiliation:
Bell Laboratories, Lucent Technologies, Orlando, FL 32819
M. T. Flemming
Affiliation:
Bell Laboratories, Lucent Technologies, Orlando, FL 32819
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Abstract

This work describes a two-step, lightly nitrided gate oxidation process for sub-0.5 jtm CMOS technology. This process is a simple extension of conventional oxidation using an in-situ N2O post oxidation anneal for nitrogen incorporation. Light nitrogen incorporation (∼3%) near the Si/SiO2 interface has improved oxide characteristics such as defect density (Do.), wear-out (Nbd), breakdown (Vbd) and tunneling (VFN) without altering its charge trapping behavior. Impacts of nitridation are more significant for thinner (<65Å) gate oxides (GOX).

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