Hostname: page-component-6898cfcb55-cbk24 Total loading time: 0 Render date: 2026-11-11T18:44:04.919Z Has data issue: false hasContentIssue false
  • English
  • Français

CMP Modeling and Characterization for Polysilicon MEMS Structures

Published online by Cambridge University Press:  15 March 2011

Brian Tang and
Duane Boning
Brian Tang
Affiliation:
Microsystems Technology Laboratories, MIT 60 Vassar St., Bldg. 39-328, Cambridge, MA 02139
Duane Boning
Affiliation:
Microsystems Technology Laboratories, MIT 60 Vassar St., Bldg. 39-328, Cambridge, MA 02139
Get access

Abstract

The current bedrock technology for integrated circuit (IC) planarization, chemical-mechanical polishing is beginning to play an important role in microelectromechnical systems (MEMS). However, MEMS devices operate with bigger feature sizes in comparison to ICs, in order to fulfill mechanical functions. We present an experiment to characterize and model a polysilicon CMP process with the specific goal of examining MEMS-sized test structures. We utilize previously discussed CMP models and examine whether assumptions from IC CMP can be applied to MEMS CMP. An analysis of the data collected points to a polishing dependence on not only pattern density, but also partly on feature size or feature configuration. The existing pattern density and step height CMP models are able to capture the major trends in up and down area polishing. However, certain layout features relevant to MEMS are difficult to predict, motivating the need for further model development and application.

Information

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 816: Symposium K – Advances in Chemical-Mechanical Polishing , 2004, K7.6
Copyright
Copyright © Materials Research Society 2004

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

Article purchase

Temporarily unavailable

References

[1] Yasseen, A., Zorman, C. A., and Mehregany, M., “Surface micromachining of polycrystalline SiC films using microfabricated molds of SiO2 and polysilicon,” Journal of Microelectromechanical Systems, vol. 8, issue 3, pp. 237–242, September 1999.Google Scholar
[2] Hetherington, D. L. and Sniegowski, J. J., “Improved Polysilicon Surface-micromachined Micromirror Devices using Chemical-mechanical Polishing,” Presented at the International Symposium on Optical Science, Engineering, and Instrumentation, SPIE's 43rd Annual Meeting, San Diego, CA, July 22, 1998 Google Scholar
[3] Gui, C., Elwenspoek, M., Tas, N., and Gardeniers, J. G. E., “The effect of surface roughness on direct wafer bonding,” J. Applied Physics, vol. 85, no. 10, pp. 7448–7454, May 15, 1999.Google Scholar
[4] Stine, B., Ouma, D., Divecha, R., Boning, D., Chung, J., Hetherington, D., Ali, I., Shinn, F., Clark, J., Nakagawa, O. S., and Oh, S.-Y., “A closed-form analytic model for ILD thickness variation in CMP processes,” Proc. CMP-MIC, Santa Clara, CA, pp. 266–273, Feb. 1997.Google Scholar
[5] Ouma, D. O., Boning, D. S., Chung, J. E., Easter, W. G., Saxena, V., Misra, S., and Crevasse, A., “Characterization and Modeling of Oxide Chemical-Mechanical Polishing Using Planarization Length and Pattern Density Concepts,” IEEE Trans. Semiconductor Manufacturing, vol. 15, no. 2, pp. 232–244, May 2002.Google Scholar
[6] Smith, T., Fang, S., Boning, D., Shinn, G., and Stefani, J., “A CMP Model Combining Density and Time Dependencies,” Proc. CMP-MIC, pp. 97–104, Feb. 1999.Google Scholar
[7] Xie, X., Park, T., Lee, B., Tubgawa, T., Cai, H., and Boning, D., “Re-examining the Physical Basis of Pattern Density and Step Height CMP Models,” MRS Spring Meeting, Symposium F: Chemical Mechanical Planarization, San Francisco, CA, April 2003.Google Scholar
[8] Grillaert, J., Meuris, M., Heylen, N., Devriendt, K., Vrancken, E., and Heyns, M., “Modelling step height reduction and local removal rates based on pad-substrate interactions,” Proc. CMP-MIC, pp. 79–86, Feb. 1998.Google Scholar
[9] Chekina, O. G., Keer, L. M., and Liang, H., “Wear-contact problems and modeling of chemical mechanical polishing,” J. Electrochem. Soc., vol. 145, no. 6, pp. 2100–2106, 1998.Google Scholar
[10] Yoshida, T., Proc. 3rd Int. Symp. on Chemical-Mechanical Planarization in IC Device Manufacturing, Vol. 99–37, p. 593, The Electrochemical Society, Pennington, NJ, 1999.Google Scholar
[11] Cai, H., Park, T., Boning, D., Kim, H., Kang, Y., Lee, J.-G., “Coherent Chip-Scale Modeling for Copper CMP Pattern Dependence,” MRS Spring Meeting, Symposium K: Chemical Mechanical Planarization, San Friancisco, CA, April 2004.Google Scholar