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Electrical Study of Metal/Gaas Interfaces*

Published online by Cambridge University Press:  25 February 2011

W.E. Spicer
Affiliation:
Stanford Electronics Laboratory, Stanford University, Stanford, CA 94303
E.R. Weber
Affiliation:
Center for Advanced Materials, Lawrence Berkeley Laboratory, Berkeley, CA 94720
Z. Liliental-Weber
Affiliation:
Center for Advanced Materials, Lawrence Berkeley Laboratory, Berkeley, CA 94720
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Extract

We have carried out a systematic study of the electrical properties of Schottky barriers formed on atomically-clean and contaminated n-type and p-type GaAs surfaces[1-11]. Diodes were fabricated by in-situ deposition on clean GaAs (110) surfaces prepared by cleavage in ultrahigh vacuum and on contaminated surfaces prepared by cleavage and exposure to the atmosphere[1-4]. The consistent and reproducible barrier height determinations from the electrical measurements of unannealed and annealed diodes, when combined with results of transmission electron microscopy (TEM)[5,6] and surface sensitive studies on identically prepared samples[7,8], are found to be a particularly critical test of models of Schottky barrier formation. A strong correlation between annealing-induced changes in the Schottky barrier height and the stoichiometry of the near interfacial GaAs is found.

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