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Layout Pattern Density and Oxide Deposition Profile Effects on Dielectrics CMP

Published online by Cambridge University Press:  18 March 2011

Young B. Park,
Joon Y. Kim and
Dae W. Seo
Young B. Park
Affiliation:
System IC R & D Center, Hyundai Electronics Co., Ltd., Cheongju, 360-480, Korea
Joon Y. Kim
Affiliation:
System IC R & D Center, Hyundai Electronics Co., Ltd., Cheongju, 360-480, Korea
Dae W. Seo
Affiliation:
System IC R & D Center, Hyundai Electronics Co., Ltd., Cheongju, 360-480, Korea
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Abstract

Test mask for characterizing pattern dependent variation of the remaining thickness after chemical-mechanical polishing (CMP) was designed with taking the experimentally obtained interaction distance into consideration. Measured interaction distance was constant independent of pattern variables such as pattern density and pattern shapes between line and area. And systematic exploration regarding pitch effects on remaining nitride thickness in STI (Shallow Trench Isolation) CMP was performed with comparing PETEOS (Plasma Enhanced Tetra Ethyl Ortho Silicate) and HDP (High Density Plasma) oxide. Both measured remaining nitride thickness and expected oxide pattern density from consideration of deposition profile effects showed a good correlation with respect to pitch variation for a constant layout pattern density.

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References

REFERENCES

1. Stine, B. E., Ouma, D. O., Divecha, R. R., Boning, D. S., Chung, J. E., Hetherington, D. L., Ali, I., Shinn, G., Clark, J., Nakagawa, O. S., and Oh, S. Y., in Proceedings of Chemical-Mechanical Planarization for ULSI Multilevel Interconnection Conference, 266 (1997).Google Scholar
2. Ouma, D., Oji, C., Boning, D., Chung, J., and Hetherington, D., and Merkle, P., in Proceedings of Chemical-Mechanical Planarization for ULSI Multilevel Interconnection Conference, 20 (1998).Google Scholar
3. Stine, B. E., Boning, D. S., Chung, J. E., Camilletti, L., Kruppa, F., Equi, E. R., Loh, W., Prasad, S., Muthukrishnan, M., Towery, D., Berman, M., and Kapoor, A., IEEE Trans. Electron Devices 45, 665 (1998).Google Scholar
4. Stine, B. E., Ouma, D. O., Divecha, R. R., Boning, D. S., Chung, J. E., Hetherington, D. L., Harwood, C. R., Nakagawa, O. S., and Oh, S. Y., IEEE Trans. Semiconductor Manufacturing 11, 129 (1998).10.1109/66.661292Google Scholar
5. Liu, G. Y., Zhang, R. F., Hsu, K., and Camilletti, L., in Proceedings of Chemical-Mechanical Planarization for ULSI Multilevel Interconnection Conference, 120 (1999).Google Scholar
6. Boning, D., Lee, B., Oji, C., Ouma, D., Park, T., Smith, T., and Tugbawa, T., in MRS Proceeding Symposium P, 97 (1999).Google Scholar
7. Smith, T. H., Fang, S. J., Boning, D. S., Shinn, G. B., and Stefani, J. A., in Proceedings of Chemical-Mechanical Planarization for ULSI Multilevel Interconnection Conference, 97 (1999).Google Scholar