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Microstructural characterization of copper metallic deposition by electroplating growth for SIP applications

Published online by Cambridge University Press:  01 March 2011

Céline Durand
Affiliation:
IPDIA, 2 rue de la Girafe, 14000 Caen, France
Bernadette Domengès
Affiliation:
LAMIPS, CRISMAT – NXP semiconductors laboratory, CNRS-UMR6508, ENSICAEN, UCBN, Presto Engineering Europe, 2 rue de la Girafe, 14000 Caen, France
Philippe Le Duc
Affiliation:
IPDIA, 2 rue de la Girafe, 14000 Caen, France
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Abstract

Microstructural characterization (Focused Ion Beam and Transmission Electron Microscopy imaging) was performed on cross-sections of contacts in thick Electro Chemical Deposition copper metallization of System In Package Integrated Circuits. It was shown that the lower growth rate of ECD-Cu in the AlSiCu – barrier Ti – PVD-Cu – ECD-Cu layer stacking is related to a local higher resistivity induced by the presence of a great number of almost planar grain boundaries in the PVD-Cu layer, which are perpendicular to the growth axis. This morphology is a consequence of the almost heteroepitaxial growth of Ti layer on AlSiCu layer.

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Type
Research Article
Copyright
Copyright © Materials Research Society 2011

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