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A Model of Thermal Stress Development in Microelectronic Components

Published online by Cambridge University Press:  21 February 2011

Geoffrey C. Scott and
Greg Astfalk
Geoffrey C. Scott
Affiliation:
AT&T Bell Laboratories, Engineering Research Center, P.O. Box 900, Princeton, NJ 08540
Greg Astfalk
Affiliation:
Convex Computer Corporation, Suite 800, 7501 Greenway Center Dr., Greenbelt, MD 20770
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Abstract

A model to characterize the development of thermal stresses in printed wiring board (PWB)-mounted multilayer ceramic capacitors (MLCC's) is presented. The model is developed analytically using uncoupled, quasi-static thermoelastic theory. Both the actual 2D geometry and mechanical and thermal properties of real MLCC-PWB structures are incorporated in the model. A particular method for solving the model equations is presented and implemented. Preliminary numerical results indicate that the values and spatial patterns of stress are in agreement with data available in the experimental literature.

Information

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 154: Symposium K – Electronic Packaging Materials Science IV , 1989, 473
Copyright
Copyright © Materials Research Society 1989

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References

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