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Models for Electronic Conduction Across Ceramic Grain Boundaries

Published online by Cambridge University Press:  28 February 2011

L. C. Burton
L. C. Burton*
Affiliation:
College of Engineering Virginia Polytechnic Institute and State University Blacksburg, VA 24061
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Abstract

Electronic current flow over grain boundary potential barriers for low resistance grains is first reviewed. It is then shown that if the resistance of the grains increases and/or grain size is reduced, the grains may be totally depleted of mobile charge. The grain boundary barrier is thus reduced to (D/2W)2 of its original large grain value, D being grain width and W the full space charge width. For high resistivity grains satisfying the relation D ≪ 2W, the conduction band becomes essentially flat. Phenomena formerly caused by grain boundary potential barriers (varistor and PTC effects seen in semiconducting ceramic) will be greatly reduced, or eliminated.

Commercial COG and X7R MLC capacitors exhibit a transition from super-ohmic to ohmic behavior at high voltages, paralleling the behavior of the varistor. Two possible mechanisms that could account for this are varistor-like grain boundary behavior, or space charge limited diffusion current.

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