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Reverse Diode Leakage in Spike-Annealed Ultra-Shallowjunctions

Published online by Cambridge University Press:  21 March 2011

Hans-Joachim L. Gossmann
Affiliation:
Agere Systems, Murray Hill, NJ
Tao Feng
Affiliation:
University of Florida, Gainesville, FL
Aditya Agarwal
Affiliation:
Axcelis Technologies, Beverly, MA
Peter Frisella
Affiliation:
Axcelis Technologies, Beverly, MA
Leonard M. Rubin
Affiliation:
Axcelis Technologies, Beverly, MA
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Abstract

We have investigated diode leakage in junctions produced by ion-implantation of B with energies of 0.5 - 2 keV and doses of 2 × 1014 — 2 × 1015 cm−2 into n-type wells of ∼1 × 1018 cm−3, after rapid-thermal anneals (RTA) in lamp-based and hot-wall furnaces. Junc- tions are as shallow as 30nm and were directly probed to avoid complications arising from metalization. The leakage current, Ilkg , was found to be independent of the implant dose at any reverse voltage (-1 and -5 V). This implies that the electrically active defects are sufficiently far removed and on the surface-side of the junction. In both systems, a spike anneal (no intentional dwell time at peak-temperature) resulted in higher Ilkg than a soak anneal (dwell time of several seconds at peak-temperature). However, for the same spike annealing recipe, the hot-wall RTA produces tighter distributions than the lamp-based RTA. The width of the distribution is a mea- sure of the temperature uniformity across the wafer. Best leakage currents are of the order 1 × 10−6 A/cm2, in good agreement with device simulations The shallowest junctions exhibit Ilkg ∼5 × 10−4 A/cm2, still well below the specification of even the low power transistor of a 100 nm technology.

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