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Trade-Offs For RAD-Hard Soi Structures

Published online by Cambridge University Press:  28 February 2011

G. E. Davis
G. E. Davis*
Affiliation:
Northrop Electronics Division, Hawthorne, CA 90250
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Abstract

Total dose, dose rate, transient, single event upset and neutron radiation effects for dielectrically isolated MOS devices on S01(silicon-on-insulator) substrates are discussed. For large-scale, high-speed circuits, material, layout and process characteristics optimized for high circuit yield and reliability may conflict with improvements required to extend radiation thresholds. Some radiation hardening techniques applicable to silicon-on-insulator high speed thin film MOS devices are presented.

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