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A diffusion-viscous analysis and experimental verification of defect formation in sintered silver bond-line

Published online by Cambridge University Press:  18 March 2014

Kewei Xiao
Affiliation:
Center for Power Electronics Systems, Virginia Tech, Blacksburg, Virginia 24061; and Department of Materials Science and Engineering, Virginia Tech, Blacksburg, Virginia 24061
Khai D.T. Ngo
Affiliation:
Center for Power Electronics Systems, Virginia Tech, Blacksburg, Virginia 24061; and The Bradley Department of Electrical and Computer Engineering, Virginia Tech, Blacksburg, Virginia 24061
Guo-Quan Lu*
Affiliation:
Center for Power Electronics Systems, Virginia Tech, Blacksburg, Virginia 24061; Department of Materials Science and Engineering, Virginia Tech, Blacksburg, Virginia 24061; and The Bradley Department of Electrical and Computer Engineering, Virginia Tech, Blacksburg, Virginia 24061
*
a)Address all correspondence to this author. e-mail: gqlu@vt.edu

Abstract

The low-temperature joining technique (LTJT) by silver sintering is being implemented by major manufacturers of power electronic devices and modules for bonding power semiconductor chips. A common die-attach material used with LTJT is a silver paste consisting of silver powder (micrometer- or nanometer-sized particles) mixed in organic solvent and binder formulation. It is believed that the drying of the paste during the bonding process plays a critical role in determining the quality of the sintered bond-line. In this study, a model based on the diffusion of solvent molecules and viscous mechanics of the paste was introduced to determine the stress and strain states of the silver bond-line. A numerical simulation algorithm of the model was developed and coded in the C++ programming language. The numerical simulation allows determination of the time-dependent physical properties of the silver bond-line as the paste is being dried with a heating profile. The properties studied were solvent concentration, weight loss, shrinkage, stress, and strain. The stress is the cause of cracks in the bond-line and bond-line delamination. The simulated results were verified by experiments in which the formation of bond-line cracks and interface delamination was observed during the pressure-free drying of a die-attach nanosilver paste. The simulated results were consistent with our earlier experimental findings that the use of uniaxial pressure of a few mega-Pascals during the drying stage of a nanosilver paste was sufficient to produce high-quality sintered joints. The insight offered by this modeling study can be used to develop new paste formulations that enable pressure-free, low-temperature sintering of the die-attach material to significantly lower the cost of implementing the LTJT in manufacturing.

Information

Type
Articles
Copyright
Copyright © Materials Research Society 2014 
Figure 0

FIG. 1. Schematic of composition evolution of nanosilver paste during drying process.

Figure 1

FIG. 2. Relationship between volume ratio (V/V0) and normalized solvent mass (${\gamma _{\rm{S}}}/\gamma _{\rm{S}}^0$).

Figure 2

FIG. 3. Schematic of (a) unit cell in at position (x, y, z) in paste and (b) principal stresses and principal strains generated in unit cell.

Figure 3

FIG. 4. Load condition of chip, showing external applied stress Papply and reaction stress of paste σz.

Figure 4

TABLE I. Relationship between viscosity E and normalized solvent mass γS.

Figure 5

FIG. 5. Solvent liquid only leaves from edges of paste deposited between chip and substrate.

Figure 6

FIG. 6. TGA plot of nanosilver paste under early drying condition at heating rate of 5 °C/min.

Figure 7

FIG. 7. Curve fitting for the rate of weight loss of solvent in the paste.

Figure 8

FIG. 8. Meshing of paste structure for numerical simulation.

Figure 9

FIG. 9. Flow chart of internal stress evolution output with different drying profile file inputs.

Figure 10

FIG. 10. Heating profiles for weight loss measurements. Profile 1 is constant ramp rate heating and profile 2 is ramp-soak combined heating.

Figure 11

FIG. 11. Experimental and simulated weight loss profiles for nanosilver paste in chip attachment with 5 mm chip length according to heating profile 1 (constant heating rate).

Figure 12

FIG. 12. Experimental and simulated weight loss profiles for nanosilver paste in chip attachment with 5 mm chip length according to heating profile 2 (ramp-soak heating).

Figure 13

FIG. 13. Experimental results of thickness shrinkage of nanosilver paste in 1 × 1 mm2, 3 × 3 mm2, and 5 × 5 mm2 chip attachments with heating profile 2 (ramp-soak heating).

Figure 14

FIG. 14. Simulation results of thickness shrinkage of nanosilver paste in 1 × 1 mm2, 3 × 3 mm2, and 5 × 5 mm2 chip attachments with heating profile 2 (ramp-soak heating).

Figure 15

FIG. 15. Distribution of vertical internal stress of nanosilver paste between 10 × 10 mm2 chip and substrate at 180 °C drying under zero external pressure for (a) 0 min, (b) 20 min, (c) 40 min, (d) 60 min, (e) 80 min, and (f) 100 min. For reason of symmetry, only a quarter of the paste is considered in the simulation. In each figure, the left bottom corner is the center of the chip and the right top corner is the corner of the chip.

Figure 16

FIG. 16. Distribution of x–y in-plane internal stress of nanosilver paste between 10 × 10 mm2 chip and substrate at 180 °C drying under zero external pressure for (a) 0 min, (b) 20 min, (c) 40 min, (d) 60 min, (e) 80 min, and (f) 100 min. For reason of symmetry, only a quarter of the paste is considered in the simulation. In each figure, the left bottom corner is the center of the chip and the right top corner is the corner of the chip.

Figure 17

FIG. 17. Nanosilver paste under a glass chip showing defect formation during 180 °C drying. (a)–(f) are observations from beginning to end of drying.

Figure 18

FIG. 18. X-ray transmission images of (a) a sintered sample dried with zero external pressure at 180 °C and (b) a sintered sample dried with 3 MPa external pressure at 180 °C. The lighter areas in the images indicate the presence of voids and cracks.

Figure 19

FIG. 19. Distribution of vertical internal stress of nanosilver paste between 10 × 10 mm2 chip and substrate at 180 °C drying under 3 MPa external pressure for (a) 0 min, (b) 20 min, (c) 40 min, (d) 60 min, (e) 80 min, and (f) 100 min. For reason of symmetry, only a quarter of the paste is considered in the simulation. In each figure, the left bottom corner is the center of the chip and the right top corner is the corner of the chip.

Figure 20

FIG. 20. Distribution of x–y in-plane internal stress of nanosilver paste between 10 × 10 mm2 chip and substrate at 180 °C drying under 3 MPa external pressure for (a) 0 min, (b) 20 min, (c) 40 min, (d) 60 min, (e) 80 min, and (f) 100 min. For reason of symmetry, only a quarter of the paste is considered in the simulation. In each figure, the left bottom corner is the center of the chip and the right top corner is the corner of the chip.