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Low-insertion-loss Gysel power combiner with high power density and high isolation

Published online by Cambridge University Press:  08 April 2021

Song Guo
Affiliation:
EHF Key Lab of Fundamental Science, School of Electronic Science and Engineering, University of Electronic Science and Technology of China, Chengdu 611731, China
Kaijun Song*
Affiliation:
EHF Key Lab of Fundamental Science, School of Electronic Science and Engineering, University of Electronic Science and Technology of China, Chengdu 611731, China
Yong Fan
Affiliation:
EHF Key Lab of Fundamental Science, School of Electronic Science and Engineering, University of Electronic Science and Technology of China, Chengdu 611731, China
*
Author for correspondence: Kaijun Song, E-mail: ksong@uestc.edu.cn
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Abstract

A suspended-stripline Gysel low-insertion-loss power combiner is presented in this paper. The multi-layer cavity structure reduces the circuit size and increases power density, composed of suspended strip lines and coaxial lines. The transmission-line theory is used to analyze this proposed power combiner, and the equivalent circuit model is developed to investigate the characteristics and design of the power combiner. The measured input return loss is greater than 20 dB from 7.15 to 9.35 GHz. The measured insertion loss is less than 0.36 dB, and the power-combining efficiency is greater than 92% from 7.39 to 9.19 GHz. The maximum power-combining efficiency is 98.8% at 8.1 GHz. Besides, the measured isolation is greater than 20 dB from 7 to 10 GHz. The power capacity is analyzed, and the cross-sectional power density is greater than 3.57 kW/cm2. The measured and simulated results show reasonable agreement with each other.

Information

Type
Passive Components and Circuits
Copyright
Copyright © The Author(s), 2021. Published by Cambridge University Press in association with the European Microwave Association
Figure 0

Fig. 1. Proposed suspended-stripline power combiner: (a) 3D view, (b) Side view, (c) Bottom view of substrate 2, (d) Top view.

Figure 1

Fig. 2. (a) Equivalent circuit model, (b) Odd mode, (c) Even mode.

Figure 2

Fig. 3. Input and output reflection coefficients with varied (a) Ztj, (b) C1j, and (c) C2j, (d) The optimization of input and output reflection coefficient.

Figure 3

Fig. 4. Simulated electric field: (a) Input power of 25 kW from Port1, (b) Input power of 25 kW from Port2, (c) Electron evolution curve at different power.

Figure 4

Fig. 5. Simulated and measured results: (a) Input/Output return loss and insertion loss, (b) Isolation and power combining efficiency, (c) Measured results of phase.

Figure 5

Fig. 6. (a) Scenario of power capacity testing: (b) Transmission test, (c) Isolation test.

Figure 6

Fig. 7. Waveform of power capacity testing: (a) Transmission test, (b) Isolation test.

Figure 7

Table 1. Comparison between the proposed power divider and reported ones.