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Toward integrated plasmonic circuits

Published online by Cambridge University Press:  15 August 2012

Volker J. Sorger
Affiliation:
University of California, Berkeley, CA, 94720, USA; vsorger@berkeley.edu
Rupert F. Oulton
Affiliation:
Blackett Laboratory, Imperial College London, UK; r.oulton@imperial.ac.uk
Ren-Min Ma
Affiliation:
University of California, Berkeley, CA 94720, USA; renminma@gmail.com
Xiang Zhang
Affiliation:
University of California, Berkeley, CA 94720, USA; xzhang@me.berkeley.edu

Abstract

Emerging telecommunication and data routing applications anticipate a photonic roadmap leading to ultra-compact photonic integrated circuits. Consequently, photonic devices will soon have to meet footprint and efficiency requirements similar to their electronic counterparts calling for extreme capabilities to create, guide, modulate, and detect deep-subwavelength optical fields. For active devices such as modulators, this means fulfilling optical switching operations within light propagation distances of just a few wavelengths. Plasmonics, or metal optics, has emerged as one potential solution for integrated on-chip circuits that can combine both high operational speeds and ultra-compact architectures rivaling electronics in both speed and critical feature sizes. This article describes the current status, challenges, and future directions of the various components required to realize plasmonic integrated circuitry.

Information

Type
Research Article
Copyright
Copyright © Materials Research Society 2012
Figure 0

Figure 1. Plasmonics for emerging ultra-compact and high performance integrated circuits. (a) Schematic of plasmonic integrated circuit components featuring high functionality on small wafer footprints.2 With the strongly enhanced light-matter-interaction of plasmonics devices, the seamless integration of plasmonic and electronic (i.e., complementary metal oxide semiconductor) components featuring similar device lengths is possible. The scale bar being on the order of the operating telecommunication wavelength (1.3–1.55 μm) highlights such nanoscale compact circuit architecture. (b) The unique dispersion relation of surface plasmon polaritons (SPPs), collective electron oscillations at metal-dielectric interfaces, yields extremely high wave vectors (k) capable of producing nanoscale optical fields, where c is the speed of light in vacuum, and ωsp is the surface plasmon polariton angular frequency.11

Figure 1

Figure 2. Surface plasmon waveguide architectures. Shown are the waveguide cross-sections, with the optical data propagating in the third dimension. (a) Insulator-metal-insulator (IMI),15 (b) metal-insulator-metal (MIM),16 (c) dielectric loaded surface plasmon polariton (DLSPP),22–24 (d) gap plasmon polariton (GPP),19 (e) channel plasmon polariton (CPP),18 (f) wedge SPP,20 and (g) hybrid plasmon polariton (HPP).17,25,26 (h) A figure-of-merit comparison for nanoscale waveguides (HPP, IMI, MIM) highlights the achievable propagation distance (Lm) in numbers of operation wavelength, λ, to the propagating optical mode size, Am, normalized by the diffraction limit of light, A0 = λ2/4.26 A trajectory shows a range of one structural parameter: HPP gap g = [1, 104] nm and core diameters D1 = 200 nm, D2 = 215 nm; for IMI and MIM D = [10, 104] nm (red curves). Scaling D of the MIM mode introduces an optical mode cutoff (green curves). The IMI does not suffer from a cutoff, yet the propagation lengths are limited (blue curves). The HPP mode offers both strong optical confinement and reasonably long propagation performance. The gray area highlights mode sizes that are above the diffraction limit. Dashed versus solid curves for IMI and MIM show dielectric (green) versus air cladding (white), respectively. Material relative permittivity: semiconductor = GaAs (εs = 12.25), oxide = SiO2 (εox = 2.25), metal = Ag (εm = –129 + 3.3i), and λ = 1550 nm. Note: E-field, electric field.

Figure 2

Table I. Plasmonic waveguide comparison of optical confinement (mode area) and propagation length (Lm) from the literature, λ free-space wavelength.

Figure 3

Figure 3. Details of the hybrid plasmon polariton (HPP) waveguide.17,26 (a) Experimental results for mapping the mode size of the HPP mode via near-field-optical spectroscopy (NSOM) overlaid with a scanning electron microscopy micrograph show the tiny waveguide mode as a red spot at the end of the waveguide. Illumination via a laser beam from the bottom of the substrate; λ = 633 nm, scale bar = 100 nm. (b) Experimental mode area resulting in a deep subwavelength mode height (λ/25) and width (λ/7), respectively (full width at half maximum were taken, λ = 1427 nm). (c) Coupling length of the hybrid waveguide benchmarked against pure dielectric waveguides highlighting dense integration possibility. The much weaker field overlaps between nearby hybrid plasmon waveguides and leads to a much longer coupling length, greatly reducing cross-talk. Waveguide cores (height x width) = 250 x 250 nm2. Simulation material indices and optical wavelength (λ): waveguide-core index = 3.5, cladding index = 1, metal index from Reference 31, oxide index = 1.48, λ = 1550 nm.

Figure 4

Figure 4. Plasmon nanolasers with different levels of optical confinement beyond the diffraction limit of light. (a–c) 1D plasmonic optical confinement. (b) Plasmon nanolaser featuring an in-plane cavity and total internal reflection of the resonating mode.39,40 (c) Fabry–Pérot type plasmon laser as a wall-like post.41 (d–f) 2D plasmon optical confinement showing (e) a Fabry-Perot type resonator utilizing the HPP mode38 and (f) a coaxial type resonator.42 (g) Two possible configurations of a spatially localized resonator featuring 3D optical confinement. (h) Localized plasmon laser demonstration utilizing a (14 nm) gold core surrounded by an Oregon Green (OG 488 nm) dye-doped silica shell. The left panel showing the electric field intensity (unity normalized) of the particle resonator indicates a strongly localized field at the metal particle (red area).43

Figure 5

Figure 5. Logic and data switching for integrated circuits. (a) Generally there are four possibilities for logic using optics and electronics. For photonic integrated circuits (PICs),3 three options are of interest; electrical data can be encoded onto an optical beam via electro-optic modulator. An all-optical approach has high potential for ultra-fast switching. When PIC elements are combined with electronic ICs, a photonic transistor is of interest that essentially is an optically gated electrical transistor or a photodetector. (b) Of particular interest for PICs is the electro-optic modulator, since it allows for stable laser operation and standardized optical power levels inside the circuit.5,7 The schematic shows how a voltage (Vgate) induced free carrier change (ncarrier) leads to a shift of the active material’s relative permittivity (Δεr(ω), with ω being the angular frequency) and consequently to a shift in the real and imaginary part (Δκ) of the propagating modal index. With these two methods, either a phase62 or an absorption modulator5,7 (shown here) can be designed.

Figure 6

Figure 6. Plasmonic electro-optic modulation. (a) Cross-sectional schematic of a silicon field-effect plasmonic modulator.5 Subwavelength slits milled through the Ag cladding form the optical source and drain, through which light is coupled into and out of the modulator. (b) Optical drain intensity as a function of gate bias (Vgate) for two source—drain separations dds (distance, dds1 = 2.2 μm and dds2 = 7.0 μm) at a wavelength λ = 1.55 μm.5 The onset of significant modulation occurs for voltages of approximately 0.5 V and saturates of approximately 0.7 V. (c) Schematic of a waveguide-integrated, compact, silicon-based nanophotonic modulator.7 The metal-oxide-semiconductor (MOS) design features a plasmonic hybrid plasmon polariton mode, which concentrates the mode’s electric field and allows for good modal overlap with an active indium tin oxide (ITO) layer. (d) The modulator performance yields a record-high 1dB/μm extinction ratio and is a direct result of the plasmonic MOS mode and the active material’s (ITO) ability to alter its optical loss.7 Increasing the device length results in stronger modulation down to –5 dB and –20 dB for 5 (black triangles) and 20 μm (black dots) long devices, respectively. No modulation was observed for reversed bias polarity when the ITO layer was omitted in control devices (black squares). The MOS capacitor operation is indirectly verified by a low leakage current (red dots) of about half a nano-ampere.

Figure 7

Figure 7. Photodetection schemes for plasmonic integrated circuits. (a) A tiny light absorbing semiconductor particle (e.g., germanium (Ge) for circuits operating at telecommunication frequencies) is placed at the end of a plasmonic waveguide for local density of states enhanced absorption of the incoming optical data, creating electron-hole pairs. These carriers can be extracted via electrical leads made from the same surface plasmon polariton waveguide, allowing for a densely integrated design. For low power consumption and high speed circuits, the goal for the detector is to reduce its capacitance by shrinking its size into the nanoscale.82 Inset, high field intensity (|E|2) of the absorber region. The colors show the intensity (magnitude of the Poynting vector) in the y-direction, and the arrows indicate the direction and magnitude of the tangential electric field (Ex and Ez). (b) Crossing a metal and semiconductor nanowire sets up a Schottky-junction, back-gated transistor, which can be used for sensitive detection of single surface plasmons. Inset, scanning electron micrograph of the main panel, overlaid with the photocurrent through the Ge nanowire as a function of laser position. Laser power P = 2.0 μW, wavelength λ = 532 nm, Vbias = 0, Vgate = 0, I = photocurrent, and ISPP the photocurrent portion of the surface plasmon polariton, Ileft the portion of the current being collected on the left, and Iright the current being collected on the right.86