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RF-MEMS multi-mode-matching networks for GaN power transistors

Published online by Cambridge University Press:  01 April 2014

Sascha A. Figur*
Affiliation:
EADS Innovation Works, München, Germany. Phone: +49 89 60729054
Friedbert van Raay
Affiliation:
Fraunhofer Institute of Applied Solid-State Physics (IAF), Freiburg, Germany
Rüdiger Quay
Affiliation:
Fraunhofer Institute of Applied Solid-State Physics (IAF), Freiburg, Germany
Larissa Vietzorreck
Affiliation:
Technische Universität München, Lehrstuhl für Hochfrequenztechnik, München, Germany
Volker Ziegler
Affiliation:
EADS Innovation Works, München, Germany. Phone: +49 89 60729054
*
Corresponding author: S.A. Figur Email: sascha.figur@eads.net
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Abstract

This work presents radio-frequency-microelectromechanical-system (RF-MEMS)-based tunable input- and output-matching networks for a multi-band gallium nitride (GaN) power-amplifier applications. In the first part, circuit designs are shown and characterized for a fixed operation mode of the transistor, i.e. either a maximum-output-power- or a maximum-power-added-efficiency (PAE)-mode, which are finally combined into a multi-mode-matching network (M3N); the M3N allows to tune the operation mode of the transistor independently of its operational frequency. The matching networks are designed to provide optimum matching for the power amplifier at three to six different operating frequencies for maximum-output-power- and maximum-PAE-mode. In the frequency range from 3.5 to 8.5 GHz, return losses of 10 dB and higher were measured and insertion losses of 0.5–1.9 dB were demonstrated for the output-matching networks. Further characterizations were performed to test the dependency on the RF-input power, and no changes were observed up to power levels of 34 dBm when cold-switched.

Information

Type
Research Papers
Copyright
Copyright © Cambridge University Press and the European Microwave Association 2014 
Figure 0

Fig. 1. Photograph of a RF-MEMS-based single stub matching network. Different colors and linetypes indicate different matching states chosen by actuating the respective switch. The microstrip line running from left to right is referred to as “through line”.

Figure 1

Fig. 2. Large signal matching points of the chosen gallium nitride transistor. Data for 3.5–8.5 GHz, normalized to 50 Ω. Filled symbols indicate data point at 3.5 GHz.

Figure 2

Table 1. Matching networks designed.

Figure 3

Fig. 3. Evaluation of measurement results.

Figure 4

Fig. 4. Photographs of the measured circuits of the output matching networks for dedicated operation modes. Left port: transistor side, right port: 50 Ω system. Reference planes 5.6 mm inwards from beginning/end of lines.

Figure 5

Fig. 5. Measurement results of the output matching network for maximum-PAE-mode. Port 1: transistor, port 2: 50 Ω system. Dashed: simulation, solid: measurement. Dashed horizontal bar: optimization target.

Figure 6

Fig. 6. Measurement results of the output matching network for maximum-output-power-mode. Port 1: transistor, port 2: 50 Ω system. Dashed: simulation, solid: measurement. Dashed horizontal bar: optimization target.

Figure 7

Fig. 7. Top view of assembled M3N. Left structure: output matching network, right structure: input matching network. Left port of structures: transistor side, right port: 50 Ω system. “GATE” is accidentally placed on the wrong side of the structure. Reference planes 8 mm inwards from center of RF connectors.

Figure 8

Fig. 8. Measurement results of input M3N– matching. Port 1: transistor, port 2: 50 Ω system. Dashed: simulation, solid: measurement. Dashed horizontal bar: optimization target.

Figure 9

Fig. 9. Measurement results of input M3N – insertion loss. Port 1: transistor, port 2: 50 Ω system. Dashed: simulation, solid: measurement. Dashed horizontal bar: optimization target.

Figure 10

Fig. 10. Measurement results of output M3N – matching. Port 1: transistor, port 2: 50 Ω system. Dashed: simulation, solid: measurement. Dashed horizontal bar: optimization target.

Figure 11

Fig. 11. Measurement results of output M3N – insertion loss. Port 1: transistor, port 2: 50 Ω system. Dashed: simulation, solid: measurement. Dashed horizontal bar: optimization target.

Figure 12

Fig. 12. Block diagram of power measurement set-up. Pin: power sensor for incident power, Prefl: power sensor for reflected power, Pout: power sensor for transmitted power. Source: [13].

Figure 13

Fig. 13. Power measurements of input M3N. Measurement done in 50 Ω system. Power from 8–34 dBm in steps of 2 dB. Low-power reference measurements with vector network analyzer marked with symbols. Port 1: transistor, port 2: 50 Ω system.

Figure 14

Fig. 14. Power measurements of output M3N. Measurement done in 50 Ω-system. Power from 8–34 dBm in steps of 2 dB. Low-power reference measurements with vector network analyzer marked with symbols. Port 1: transistor, port 2: 50 Ω system.

Figure 15

Table 2. Comparison with state-of-the-art.