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Reusability-based selection of parametric finite element analysis models

Published online by Cambridge University Press:  11 February 2009

Nsikan Udoyen
Affiliation:
Systems Realization Laboratory, George W. Woodruff School of Mechanical Engineering, Georgia Institute of Technology, Atlanta, Georgia, USA
David W. Rosen
Affiliation:
Systems Realization Laboratory, George W. Woodruff School of Mechanical Engineering, Georgia Institute of Technology, Atlanta, Georgia, USA
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Abstract

A selection method to support adaptive reuse of parametric finite element analysis (FEA) models is introduced in this paper. Adaptive reuse of engineering artifacts such as FEA models is common in product design, but difficult to automate because of the need to integrate new information. The proposed method factors reusability into selection by evaluating models based on comparative estimates of effort involved in adapting them for reuse to model a query problem. The method is developed for FEA models of component-based designs. FEA modeling of electronic chip packages is used to illustrate the method's usefulness. We conclude with a discussion on the method's advantages and limitations and highlight important issues for further research.

Information

Type
Research Article
Copyright
Copyright © Cambridge University Press 2009
Figure 0

Fig. 1. A cross-section view of a flip chip on board chip package. [A color version of this figure can be viewed online at journals.cambridge.org/aie]

Figure 1

Fig. 2. A two-dimensional FEA model of an underfilled flip chip on board with lumping assumption. [A color version of this figure can be viewed online at journals.cambridge.org/aie]

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Fig. 3. A two-dimensional FEA model of a flip chip on board without underfill. [A color version of this figure can be viewed online at journals.cambridge.org/aie]

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Fig. 4. Case-based retrieval strategies (Azuaje et al., 2000). [A color version of this figure can be viewed online at journals.cambridge.org/aie]

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Fig. 5. FEA model preprocessing. [A color version of this figure can be viewed online at journals.cambridge.org/aie]

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Table 1. Summary of modeling strategy description entities

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Table 2. Summary of model implementation description entities

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Fig. 6. An analysis geometry representation for the FEA model of a flip chip on board with lumping assumption. [A color version of this figure can be viewed online at journals.cambridge.org/aie]

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Fig. 7. An automated evaluation of a reference model based on a modeler's intended reuse. [A color version of this figure can be viewed online at journals.cambridge.org/aie]

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Fig. 8. The complete implementation of a two-dimensional FEA model of a flip chip on board chip package. [A color version of this figure can be viewed online at journals.cambridge.org/aie]

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Fig. 9. The adapted FEA model. [A color version of this figure can be viewed online at journals.cambridge.org/aie]

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Fig. 10. The projected adaptation of the reference models. [A color version of this figure can be viewed online at journals.cambridge.org/aie]

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Fig. 11. The repository contents: 1. leadless plastic chip carrier (ASAT, 2006), 2. plastic ball-grid array (Amkor, 2006), 3. flip chip ball-grid array (LSI Logic, 2006), 4. ceramic ball-grid array (Deletage et al., 1996; Pang et al., 2000), 5. enhanced ball-grid array (Fujitsu, 2006), and 6. flip chip lead molded package (Yong et al., 2002; Fairchild Semiconductor, 2006). [A color version of this figure can be viewed online at journals.cambridge.org/aie]

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Table 3. Reusability metric values