Analysis of the proposed power divider

Figure 2 depicts the configuration of the proposed power divider. It consists of a standard WR-28 waveguide as the input port, two microstrip line output ports, and an insulator. The ridge waveguide, function as an impedance transformer between waveguide and planar transmission line, is hidden in the standard waveguide, so the whole circuit size is more compact than the circuit in [Reference Xu, Xu, Cui and Qian10–Reference Dang, Zhang, Zhu, Yan and Xu12] in which the impedance transformation is accomplished by stepped-impedance waveguide. The isolation between two output ports is realized by an insulator which is inserted into the junction from the bottom of the substrate. Two chip resistors connect with the insulator by two microstrip lines which are also hidden in the waveguide, whereas the isolation circuits in [Reference Chu, Wu and Mo7, Reference Guo, Li, Huang, Shao, Ba, Jiang, Jiang and Deng8, Reference Xu, Xu, Cui and Qian10–Reference Ding, Wang, Zhang and Wang13] are exposed outside which results in a large circuit size. The substrate used in this circuit is Rogers RT/Duroid 5880 with a thickness of 0.254 mm, loss tangent of 0.0009, and relative dielectric constant of 2.2.

Fig. 2.

Configuration of the proposed power divider.

The proposed power divider is developed from waveguide E-type T-junction, so its operational principle can be explained by waveguide E-type T-junction. Figure 3 shows the structure of the waveguide E-type T-junction, the electric field of the propagated TE10 mode is depicted in Fig. 3(b). It is well known that the signal can be propagated only when the electric field direction on the rectangular waveguide wide side is opposite. When ports 2 and 3 are fed by the same amplitude and in-phase signal sources (even-mode excitation), the rectangular waveguide TE10 mode in port 1 cannot be excited under this condition. Thus, there is no signal transmitted to port 1. However, the energy can be coupled to the probe and then be absorbed by chip resistors, thus good isolation can be obtained. When the two output ports are fed by signal sources with equal amplitude and anti-phase (odd-mode excitation), the rectangular waveguide TE10 mode in port 1 is excited under this condition, and no energy is absorbed by chip resistors as the energy coupled to the probe is canceled with each other, resulting in most of the energy is delivered to port 1. According to the analysis above, the scatter parameters of the power divider can be summarized as

(1)$$[ S] = \displaystyle{{\sqrt 2 } \over 2}\left[{\matrix{ 0 & {-1} & 1 \cr {-1} & 0 & 0 \cr 1 & 0 & 0 \cr } } \right]$$

Fig. 3.

Structure of the waveguide E-type T-junction: (a) structure and (b) electric field distribution.

According to the even- and odd-method [Reference Pozar17], the S-parameters of this proposed power divider can be expressed as

(2)$$\vert {S_{11}} \vert = \vert {S_{11}^o } \vert = \vert {\Gamma_{o1}} \vert $$

(3)$$S_{21}{\rm} = S_{ 31} = \sqrt {\displaystyle{{1-{\vert {\Gamma_{o1}} \vert }^2} \over 2}} $$

(4)$$S_{22}{\rm} = S_{ 33} = \displaystyle{{\Gamma _{e2} + \Gamma _{o2}} \over 2}$$

(5)$$S_{23} = \displaystyle{{( \Gamma _{e2}-\Gamma _{o2}) } \over 2}$$

where Γ_{o 1} and Γ_{o 2} are the reflection coefficients at ports 1 and 2 when the whole circuit is under odd-mode excitation, respectively. Γ_{e 2} is the reflection coefficient at port 2 when the whole circuit is under the even-mode excitation.

Vertical transition between waveguide and microstrip line

As shown in equation (2), it can be seen that matching at port 1 is determined by the odd-mode reflection coefficient which is mainly determined by the dimensions of the ridge waveguide. Figure 4 shows the physical dimension of the ridge waveguide to microstrip line. For the simplicity of design, the ridge waveguide has the same width as the microstrip line. The microstrip line is surrounded by housing with waveguide modes free and mechanical protection. The inner dimension of the housing is chosen as 0.7 mm × 2 mm. Under this shielding house, the width of 50 Ω transmission line is 0.75 mm. To achieve a good impedance matching over broad frequency band, stepped ridge waveguide is applied. The triangle shape of the ridge waveguide used in this circuit is for the fabrication concern. Figure 5 depicts the simulated results of the return loss of port 1 when h ₁ = 0.78 mm and h ₂ changes. It shows that the ridge height has a great impact on the return loss of port 1, validating the equation in (2).

Fig. 4.

Transition between waveguide and microstrip line: (a) side view and (b) top view.

Fig. 5.

Simulated results of the input return loss with varying h ₂.

Isolation between two output ports

Figure 6 shows the configuration of the planar circuit and insulator. Physical dimensions of the probe are d ₁ = 0.38 mm, d ₂ = 2.7 mm, l ₁ = 2.04 mm, and l ₂ = 1.5 mm. To minimize the whole circuit, one end of the probe is cut-off when the insulator is utilized in the proposed power divider. The height of the probe (l ₁) is about quarter-wavelength at the central operating frequency. The insulator inserts from the bottom of the substrate, as shown in Figs 6(b) and 6(c). To avoid shorting the probe, a circular metal on the backside of the substrate is removed, as shown in Fig. 6(c). Its diameter is chosen as 1.5 mm in this proposed Ka-band power divider, which is larger than d ₁ and smaller than d ₂. The probe connects with the microstrip line at the top layer of the substrate. Another end of the microstrip line is connected with the chip resistor. As the chip resistor's power capacity is directly proportional to its value, the value of the chip resistor is selected as 100 Ω in this proposed circuit.

Fig. 6.

Configuration of the planar circuit and insulator: (a) insulator, (b) side view, and (c) top view.

Figure 7 shows the simulated output return loss and isolation under different characteristic impedances of the microstrip line when the chip resistor's value is fixed at 100 Ω. It can be observed that the characteristic impedance has a great influence on the output return loss and isolation. This can be explained by equations (4) and (5), the output return loss and isolation are relevant with Γ_{e 2} which is affected by the isolation circuit.

Fig. 7.

Simulated results of the power divider under different characteristic impedance: (a) S ₂₃ and (b) S ₂₂.

Since the chip resistors are mounted on the substrate and surrounded by the waveguide, physical dimensions of the chip resistor should be considered. The dimension of the standard Ka-band waveguide is 3.556 mm × 7.112 mm, and the chip resistor's dimension used in this circuit is 1.6 mm × 0.8 mm × 0.5 mm. As shown in Fig. 6(c), the total length of the microstrip line and two chip resistors may exceed the length of the waveguide (7.112 mm). Moreover, as the narrow side of the waveguide does not influence on the propagation of TE10 mode in the waveguide, two housings on the narrow side are dug to assemble the chip resistors. The dimensions of the housing are 2.5 mm × 2.2 mm × 1.5 mm.

Experiment and discussion

In order to validate the proposed design concept, a power divider operating at the Ka-band is simulated, fabricated, and measured. For the convenience of measurement, two microstrip-to-waveguide transitions [Reference Tang, Pan, Cheng and Lin18] are cascaded to the planar output ports. The planar circuits are etched on the top layer of a Rogers RT/Duroid 5880 substrate. Two Vishay 100 Ω thin-film chip resistors are soldered between the microstrip line and grounding pad. The whole power divider consists of four parts, i.e. three cavities and a planar substrate. The planar substrate is sustained by the bottom cavity. Figure 8 shows photographs of the fabricated waveguide power divider. For the simplicity of fabrication, the whole cavity is divided into three parts, i.e. left-side cavity, right-side cavity, and the bottom cavity. The left-side and the right-side cavities are symmetrical, which are bisected from the narrow side of the WR-28 waveguide.

Fig. 8.

Photographs of the fabricated power divider: (a) whole circuit, (b) planar circuit and bottom cavity, and (c) cavity of the left side.

The circuit is measured by using an Agilent N5244A network analyzer. Comparisons between the simulated and measured results are shown in Fig. 9. It can be seen that from 34 to 39 GHz, the insertion loss including waveguide-to-microstrip transition at the output port is <1.5 dB, the isolation is better than 20 dB, and the return loss of three ports is better than 10 dB. The phase deviation of two outputs is in the range of 178.3–181.3°, and the magnitude imbalance is <0.5 dB. Especially, in the range of 36.2–37.2 GHz, the isolation between two output ports are better than 40 dB, and the return loss of three ports is better than 21, 19.8, and 20.8 dB, respectively.

Fig. 9.

Comparisons between the simulated and measured results of the proposed power divider: (a) S ₁₁, S ₂₁, and S ₂₃, (b) S ₂₂ and S ₂₃, (c) insertion loss, and (d) magnitude and phase imbalance.

Table 1 shows comparisons between the proposed power divider and the previously reported ones. It can be observed that the proposed circuit has excellent isolation performance, especially when considering the isolation better than 40 dB, only the circuits in [Reference Hwang6, Reference Chu, Wu and Mo7] can achieve this level. However, their isolation bandwidths are relatively narrow. Moreover, the output ports of the circuits in [Reference Hwang6–Reference Gouda, López, Desmaris, Meledin, Pavolotsky and Belitsky11, Reference Ding, Wang, Zhang and Wang13] are rectangular waveguide ports, which is inconvenient to integrate with other planar circuits such as power amplifiers, low noise amplifiers, and so on. Furthermore, the impedance-transformation stages in [Reference Chu, Wu and Mo7–Reference Gouda, López, Desmaris, Meledin, Pavolotsky and Belitsky11] are based on waveguide stepped-impedance transformers, and the isolation circuits in [Reference Chu, Wu and Mo7, Reference Guo, Li, Huang, Shao, Ba, Jiang, Jiang and Deng8, Reference Xu, Xu, Cui and Qian10–Reference Ding, Wang, Zhang and Wang13] are exposed outside. These drawbacks create a hurdle to further improve the circuit's integration level and result in a large circuit size. However, in this proposed power divider, the output ports are planar and the isolation part is hidden in the waveguide. So, it can be concluded that the proposed power divider shows advantages of compact size, planar output port, and easy integration with other circuits when compared with the power dividers in [Reference Hwang6–Reference Gouda, López, Desmaris, Meledin, Pavolotsky and Belitsky11, Reference Ding, Wang, Zhang and Wang13]. When compared with the power dividers in [Reference Pasian, Silvestri, Rave, Bozzi, Perregrini, Jacob and Samanta5, Reference Guo, Li, Huang, Shao, Ba, Jiang, Jiang and Deng8–Reference Vincenti Gatti and Rossi16], the proposed power divider has the merits of high isolation.

Table 1.

Comparisons between the proposed power divider and previously reported ones

^a Estimated.

^b Including insertion loss of waveguide-to-microstrip transition at two output ports.