Tunable PGGWG cavity geometry

PGGWG is realized within parallel plate waveguide by using blind vias and catch pads to create an electromagnetic bandgap (EBG) medium on either sides of a groove (Fig. 1(a)) [Reference Oyedokun, Geschke and Stander7]. The groove allows for the propagation of TE₁₀ mode similar to that in SIW. The EBG suppresses the parallel plate mode that would otherwise propagate along the sidewalls, similar to machined GGWG [Reference Rajo-Iglesias and Kildal15]. The advantage of biasing varactors using PGGWG is evident by the comparison in Figs 1(b) and 1(c). Although a varactor-loaded combline cavity in PGGWG may be loaded using only conventional surface-mount components and etched DC traces, the loading of varactors in coaxial SIW cavities requires a bridging wire and multiple annular rings. It is the bridging wires, in particular, that hamper mass production of the circuit, as it is a manufacturing step incompatible with automated pick-and-place PCB assembly. The disadvantage of PGGWG is that at least three copper routing layers are required, while SIW may be implemented on a single double-sided PCB. However, as multi-layer PCBs are commonly used for e.g. SatCom applications [Reference Simon, Schaefer, Bruni, Campo, Litschke, Otto and Holzwarth10], this is not necessarily a major drawback to the topology.

Fig. 1.

(a) PGGWG cavity cross-section. (b) RF and DC signal path in PGGWG rectangular resonant cavity. (c) RF and DC signal path in SIW resonant cavity [Reference Sirci, Martinez, Taroncher and Boria4].

The geometry of the rectangular tunable PGGWG cavity described here resembles a combline resonator topology, although the field pattern suggests a TE₁₀₁ operating mode. The rectangular resonant cavity shown in Fig. 2 uses three rows of EBG vias to form cavity sidewalls. This has been demonstrated to be sufficient to suppress parallel waves, ensuring that the field is confined within the groove [Reference Oyedokun, Geschke and Stander7]. The dimensions of the cavity are shown in Table 1. The non-PTFE, low-cost Mercurywave 9350 substrate with ɛ_r = 3.5 and loss tangent of 0.004 was used.

Fig. 2.

PGGWG rectangular resonant cavity structure. (a) Inside view of the cavity. (b) Top view showing the center via and isolated metal patch and varactor diode attachment. (c) Bottom view.

Table 1.

Dimensions of the tunable PGGWG rectangular resonant cavity

The length of the cavity, L_g is chosen to ensure the fundamental TE₁₀₁ mode resonates in the cavity while the coupling to the cavity, set by the iris width C_g, is chosen to minimize port loading effects, as is required by the three-point Q ₀ extraction method [Reference Leong and Mazierska16]. The application of this technique requires light coupling (as seen in e.g. Fig. 5) and values of S ₁₁ ≈ 1, leading to the approximation of Q ₀ ≈ Q_e in extracting Q ₀ from S-parameters. A through-hole plated via of diameter v_d = 0.3 mm is placed at the center of the cavity connecting the top isolated patch with the bottom conducting plane. The etched gap of width p_g ensures DC isolation despite the through-hole via in the middle of the cavity. The gap creates a capacitive loading between the center post and the top metal layer of the PGGWG through the fringing fields across the gap. This can be observed in Fig. 3 in the gap between the island patch and the top metal plate. As there is no experimentally defined definition of effective cavity width for PGGWG (as is available for SIW [Reference Caranicola and Fatima Salete17]), and since the analytically-defined coaxial resonant mode in [Reference Sirci, Martinez, Taroncher and Boria3] is not present here, the cavities are sized using full-wave parameter tuning.

Fig. 3.

Electric field vector plot inside the cavity.

Extensive parametric studies on the effects of p, h, v_d, and h_a variation on PGGWG have been presented previously [Reference Oyedokun, Geschke and Stander9, Reference Oyedokun, Geschke and Stander13]. The results of these parametric studies are applied here, to ensure that the band gap generated by the blind via rows (which effectively form the cavity sidewalls) covers the frequency range of the loaded TE₁₀₁ resonant mode of the cavity, as determined by L_g (selected to be approximately λ_g/2 at the required f ₀, given the value of β reported in [Reference Oyedokun, Geschke and Stander9]) and w.

A sequential multilayer PCB build is applied in the manufacturing of the PGGWG. The EBG via holes are first drilled and plated on the substrate of height h, followed by through-hole plating and etching of the catch pads from the 17.5 μm copper cladding. The top substrate layer h_a is then added. The center via of the cavity is then drilled through the stack-up and through-hole plated, after which the floating pad is etched. As the center via is only drilled and plated after lamination, there is no risk for misalignment of separately drilled and plated vias (which may have been the case if the h and h_a substrates were drilled and plated separately prior to lamination). Consequently, there is no need for a catch-pad to provide for possible misalignment in the center via.

Simulation results

The loading capacitance C_g across the gap p_g of Fig. 2 is controlled electrically by placing a varactor diode in reverse bias across the gap [Reference Oyedokun, Geschke and Stander13]. The varactor diode is biased by applying the DC voltage directly to the top conducting plane via a butterfly stub, which presents an RF open circuit at the point of contact with the top plate of the PGGWG cavity and an RF short circuit at the DC side of the stub.

An EM-circuit co-simulation is performed in CST Microwave Studio using the time domain solver as shown in Fig. 4. A MACOM 46580 varactor diode is selected in this design example, with C_jo = 1.57 pF. The parasitics of the varactor diode packaging, C_p and L_p are also included, as detailed in the manufacturer's datasheet.

Fig. 4.

3D EM-circuit co-simulation set-up showing the equivalent circuit model for MACOM 46461-276 varactor diode connected.

Figure 5 shows the resulting S-parameters, which indicates a variation of f ₀ from 31.63 to 32.71 GHz (3.36% tuning range) achieved by varying the junction capacitance from 0.15 to 0.45 pF. Neglecting surface roughness, the unloaded Q-factor varies over the tuning range from 143 to 160. In addition to the effect of parametric variations on h, v_d, and p_d reported previously [Reference Oyedokun, Geschke and Stander7–Reference Oyedokun, Geschke and Stander9], the parametric sweeps shown in Figs 6 and 7 indicate that the resonant frequency of the PGGWG cavity could be selected from a combination of parameters. In Fig. 6, it can be observed that an increase in the width w (parameter indicated in Fig. 1) decreases the resonant frequency of the cavity. Similarly, the changes in the cavity length L_g as shown in Fig. 7 influence the resonant frequency of the cavity. The inverse relationship between f ₀ and w, as well as L_g, supports the view that the cavity exhibits a TE₁₀₁-type resonant mode, although the effective width a_eff is not well-defined as with SIW, which complicates an analytical calculation of f ₀.

Fig. 5.

EM co-simulation result of S ₂₁ (dB) of the two-port loaded rectangular PGGWG cavity.

Fig. 6.

Parameter sweep of tunable PGGWG cavity dimensions for a constant varactor C_j = 0.37 pF. Variation in w and v_d is shown.

Fig. 7.

Parameter sweep of tunable PGGWG cavity dimensions for a constant varactor C_j = 0.37 pF. Variation in p _L and L _g is shown.

A variation in the square catch pad dimension, p_L is shown in Fig. 7. A larger pad results in lower resonant frequency, due to an increased capacitive load to the PGGWG cavity. In comparison, variation in the via diameter, v_d, has a much smaller effect on resonant frequency, as shown in Fig. 6.

Construction and measurement results

Figures 8(a) and 8(b) show the fabricated circuit (top and bottom views) with the varactor diode attached. Micrographs of sectioned views along the sidewall X ₁–X ₁′ and along the center X–X′ are shown in (Figs 8(c) and 8(d)), respectively.

Fig. 8.

Photographs of the fabricated PGGWG tunable cavity circuit. (a) Top view with varactor diode attached. (b) Bottom view. (c) Micrographs showing the cross section X ₁–X ₁′. (d) Micrographs showing the cross section X–X′. (e) Varactor diode attachment on the top plane. (f) DC bias line.

The prototype is characterized on an Anritsu MS4647A VNA (Fig. 9). The measured results shown in Fig. 10 indicate a 4.48% continuous frequency tuning range from 32.52 to 33.98 GHz, corresponding to DC bias voltage range of 0–16 V. The resonator Q ₀ varies from 63 to 85 across the tuning range. Table 3 compares simulated and measured results.

Fig. 9.

Photograph of the fabricated circuit attached to the network analyzer.

Fig. 10.

Measured S ₂₁ (dB) of the tunable PGGWG cavity.

After including 1.6 μm RMS copper foil surface roughness [Reference Liang, Hall, Heck and Brist18] in the EM co-simulation of the tunable cavity, the discrepancy between simulated and measured Q-factors can be replicated, in simulation, by increasing R_S to 2.0 Ω (100% increase) resulting in an unloaded Q-factor of 76, or increasing tan δ to 0.01 (150% increase) with unloaded Q-factor of 87. These changes can be observed in Figs 11 and 12. The cause for the reduced Q-factor is, therefore, more likely to be underestimation of R_S in the circuit model than underestimation of tan δ.

Fig. 11.

Comparison for R_s and tan δ with surface roughness 1.6 μm included in EM-co simulation of the tunable cavity. R_s is varied with C_jo = 0.37 pF, tan δ = 0.004.

Fig. 12.

Comparison for R_s and tan δ with surface roughness 1.6 μm included in EM-co simulation of the tunable cavity. tan δ is varied with R_s = 1.0 Ω, C_jo = 0.37 pF.

The discrepancy between the simulated and manufactured geometries, as determined by the micrograph, is shown in Table 2. This manufacturing error can explain the shift in the resonant frequency of the circuit. A variation in the catch pad size p_d changes the resonance frequency of the cavity [Reference Oyedokun, Geschke and Stander9]. A decrease in the pad dimension increases the suppression band of the EBG, therefore increasing the resonant frequency of the cavity. Also, as observed in Table 3, the gap height h_a indicates a manufacturing error of 28 μm (16.6%). This changes the capacitance between the top conducting plane and the round catch pad, resulting in a shift of the suppression band of the PGGWG structure. Furthermore, the shift in frequency can also be attributed to an underestimation of the varactor parasitics in simulation. The 12 dB discrepancy between simulated and measured S ₂₁ maxima represents a variation of only 2.4% in transmission magnitude, and may safely be attributed to increased strength in coupling resulting from the reduced values of p_d and v_d. The three-point Q ₀ characterization method [Reference Leong and Mazierska16] is not affected by this discrepancy, although this variation should be carefully considered in other applications where a specific Q_e is sought (e.g. in filter or voltage controlled oscillator (VCO) circuits).

Table 2.

Comparison between the dimensions of simulated and fabricated circuits

Table 3.

Comparison between simulated and measured results

Table 4 compares our study to the state-of-the-art research studies in terms of achieved f ₀, Q ₀, tuning range, number of varactors used, and the necessity for bridging wires or multi-layer routing. S-parameters and external Q-factor Q_e are omitted from the comparison, as these are functions of resonator coupling (as determined by the synthesis of the application filter or VCO) and are not intrinsic performance metrics of the resonator itself [Reference Leong and Mazierska16]. From this table, it is evident that to enable varactor diode biasing, state-of-the-art schemes require multi-layer routing or bridging wires bridging wires or multi-layer routing, to which this study is an exception.

Table 4.

Comparison of tunable resonant cavities