Pinning theories

According to the Schottky-Mott theory,Reference Schottky¹⁴ when a metal and semiconductor are brought into contact, the two Fermi levels align, so the semiconductor Fermi level at the interface is modified. The potential barrier Φ_B between the two should ideally be set by the metal work function Φ_M and semiconductor electron affinity χ_S, where Φ_B = Φ_M – χ_S for an n-type semiconductor. However, in reality, this dependence is not experimentally observed. Schottky barrier heights tend to be pinned at a value roughly independent of the metal work function, as shown in Figure 1.

Figure 1.

(a) Band diagram of an ideal unpinned Schottky barrier, where q represents the electronic charge, Φ_M is the metal work function in vacuum, and χ_S is the semiconductor electron affinity. (b) Band diagram of a pinned Schottky barrier where the effective metal work function Φ_M,eff is modeled as differing from the work function in vacuum Φ_M. The Schottky barrier height is indicated by Φ_B. E _C is the conducting band energy, E _V the valence band energy, and E _F the Fermi energy level.

Currently, there are two popular Fermi-level pinning theories, where the origin of the pinning states varies with the model. Two of the more popular ones are the metal-induced gap states (MIGS) and bond polarization theories.

Heine first proposed the MIGS theory in 1965,Reference Heine¹⁵ which was later supported by Tersoff.Reference Tersoff¹⁶ The basis of this theory is that wave functions of electrons in the metal tail can decay into the semiconductor in the forbidden bandgap energy range, creating intrinsic states known as the metal-induced gap states. Near the valence band, these states are found to be mostly donor-like, and near the conduction band, they are mostly acceptor-like. The charge neutrality level (E _CNL) is then the energy level at which the interface states change from mostly donor-like to acceptor-like. In a metal/semiconductor junction, the charging of these states by the metal wave function creates a dipole charge that causes the Fermi level, E _F, to align to minimize the dipole charge toward zero, effectively pulling the E _F at the interface toward E _CNL. How close the interface E _F is to E _CNL is determined by the semiconductor’s dielectric screening or pinning factor S,Reference Yeo, King and Hu¹⁷ through the relationship

(1)

S is empirically found to be inversely related to the electronic component of the dielectric constantReference Mönch¹⁸ ε_∞, and ranges from 0 to 1. The effective metal work function is given by Φ_M,eff, while the work function at the charge neutrality level is given by Φ_CNL. Semiconductors tend to have a smaller S than oxides and other dielectrics, which explains why generally Fermi-level pinning does not exist in metal/oxides junctions.

Tung’s bond polarization theoryReference Tung¹⁹ is similar to the MIGS theory in the idea of gap states being the source of Fermi-level pinning. However, the difference in Tung’s theory is the idea that the gap states arise from the bond polarization of the chemical bonds at the metal semiconductor interface, while in MIGS, it is assumed that the distribution of gap states is only a function of the semiconductor, with no dependence on the metal. In actuality, there must be a rearrangement of charge in forming the chemical bonds between the metal and semiconductor in order to satisfy thermodynamics and the minimization of interface energy. This interaction of metal and semiconductor wave functions at a Schottky junction are accounted for in the formation of an interface specific region, where the electronic states are not fully metal or semiconductor-like, but rather a mixture of the two. Minimization of the total interface energy causes the metal and semiconductor charge density to relax, creating an interface dipole that pins the Fermi level.

Fermi-level pinning in high mobility semiconductors

In general, for the application of MOSFET S/D ohmic contacts, Fermi-level pinning is undesirable since it takes away the ability to use metal work functions to tune to the barrier height. However, in the case of Ge, the Fermi level pins close to the valence band, which causes most metals to form a negative barrier to p-Ge, making ohmic contact formation extremely simple since there is no barrier for the majority carriers (Figure 2).Reference Pethe²⁰ Similarly, the InAs Fermi level pins within the conduction band, which simplifies the formation of ohmic contacts to n-InAs. However, simplifying ohmic contacts for p-type typically means complicating ohmic contacts for n-type, and vice versa, since the barrier height may now be even larger than the entire bandgap. Figure 3 summarizes the E _CNL and typical n-type and p-type Schottky barrier heights for a range of semiconductors.

Figure 2.

Measured current-voltage characteristics of NiGe/Ge Schottky diodes on n-type and p-type Ge.Reference Pethe²⁰ Rectifying characteristics are observed on n-type, and ohmic characteristics are observed on lightly doped p-type, confirming Fermi-level pinning within the valence band edge.

Figure 3.

Band diagram information (E _C [conduction band energy], E _V [valence band energy], and E _CNL [charge neutrality level]) for high mobility semiconductor materials, with E _CNL indicated by the purple line. Numbers near E _C represent typical pinned n-type Schottky barrier height Φ_BN, and numbers near E _V represent typical pinned p-type Schottky Φ_BP.

Depinning the Fermi levels

For the application of high mobility MOSFET S/D contacts, we need a near zero barrier height for minimal contact resistance, so the strong metal/semiconductor Fermi-level pinning needs to be reduced. Connelly et al.Reference Connelly, Faulkner, Grupp and Harris¹³ first depinned the metal/Si Fermi level by inserting an ultrathin silicon nitride (Si₃N₄) in between the metal and Si. In accordance with the MIGS theory, the ultrathin insulator physically separates the two materials, allowing the metal electron wave function to be attenuated in the insulator prior to penetrating the semiconductor. The attenuated metal states result in fewer charges available to drive E _F toward E _CNL, as shown in Figure 4. After depinning the Fermi level, the metal work function Φ_M can then be used to tune the effective barrier height. For n-type ohmic contacts, metals with a low Φ_M near the semiconductor conduction band should result in a near zero barrier height. For p-type ohmic contacts, metals with a high Φ_M near the semiconductor valence band would be desirable.

Figure 4.

(a) Schematic band diagram of a pinned Fermi level. The metal and semiconductor are in direct contact, allowing the tail of the metal electron wave function to decay into the semiconductor bandgap, creating metal-induced gap states that pin the Fermi level. (b) Metal/semiconductor Fermi-level depinning, where with an insulator, the metal wave function is attenuated in the gap states. (c) Schematic band diagram of a shift in the metal/semiconductor Fermi-level pinning by the formation of an electronic dielectric dipole.

More recently, Coss et al.Reference Coss, Loh, Oh, Smith, Smith, Adhikari, Sassman, Parthasarathy, Barnett, Majhi, Wallace, Kim and Jammy²¹ used AlO_x and LaO_x to reduce the metal/Si barrier height to Φ_BN ≤ 0.1 eV and Φ_BP ≤ 0.2 eV, but the authors cited electronic dipole formation as the underlying mechanism, where in accordance with the bond polarization theory, an electronic dielectric dipole (Φ_Dipole) is created between the insulator and the semiconductor native oxide, inducing a barrier shift so Φ_BN = Φ_M + Φ_Dipole – χ_S. This dipole can be visualized as modifying the effective metal work function (Φ_M,eff) and the interface specific region (Figure 4c), where for a given semiconductor, the magnitude of the dipole effect depends mainly on the insulator material. In this case, the metal work function Φ_M needed for an ohmic contact would depend on the dipole magnitude.

Nevertheless, regardless of the underlying mechanism, the use of a thin insulator inserted in between the metal and semiconductor has been shown to be generally applicable to Ge and III–V semiconductors in reducing the effective electrical barrier height (Φ_B,eff). Due to the absence of a model that accurately models the metal-thin insulator-semiconductor (MIS) structure, the term Φ_B,eff is used to represent the overall electrical behavior of the MIS structure, modeled as a simple metal-semiconductor.

MIS contact to Ge

The MIS contact structure on both n-type and p-type Ge has been studied by several groupsReference Lieten, Degroote, Kuijk and Borghs^22–Reference Kobayashi, Kinoshita, Saraswat and Wong²⁴ using a variety of dielectrics ranging from Ge₃N₄ to AlO_x. The application of the MIS contact appears to be generally applicable to various dielectrics, where the minimum achievable Φ_B,eff can depend on both the metal and dielectric materials. It should be noted that these MIS contacts have been made on low doped substrates to minimize the tunneling current through the barrier and to emphasize the thermionic emission current over the barrier. This allows for a more accurate extraction of the barrier height and highlights the effect of changes in Φ_B,eff. However, as a result, these contacts do not demonstrate extremely low contact resistances, and, in some cases, contact resistance is not even measured.

Lieten et al.Reference Lieten, Degroote, Kuijk and Borghs²² demonstrated the first MIS contact using a thin Ge₃N₄ layer to form an ohmic n-Ge contact and a rectifying p-Ge contact. Following the nitridation technique used by Connelly et al.Reference Connelly, Faulkner, Grupp and Harris¹³ on Si, the authors exposed Ge(001) and Ge(111) to nitrogen plasma in UHV at temperatures between 550–600°C to form both amorphous and (poly)crystalline Ge₃N₄ with a thickness of 0.7 nm. Metal was deposited immediately following the nitridation to suppress oxide formation, and no post deposition annealing was performed. Schottky barrier control samples were fabricated together.

In contrast to the rectifying behavior of the control samples without Ge₃N₄, the current conduction through n-Ge samples with Ge₃N₄ was found to be ohmic for low work function metals Al (4.1 eV), Cr (4.5 eV), and Co (5.0 eV). For higher work function metals Au (5.4 eV) and Pt (5.6 eV), the current remained rectifying. This difference is promising for MIS contacts, because it indicates a sufficient reduction in the Fermi-level pinning to allow barrier height tuning through the metal work function. However, it should be noted that that the surface is not completely unpinned because Φ_B,eff ≠ Φ_M – χ_S. Table I summarizes the changes in the Φ_B,eff with metal work function. Through this, Ge₃N₄ is shown to have a twofold benefit: (1) it passivates the dangling bonds of Ge for a low trap density at the Ge₃N₄/Ge interface, and (2) it has fewer surface states than Ge or effectively a larger pinning factor S.

Table I.

Summary of effective barrier heights calculated from current-voltage (I-V) measurements for several metal work functions with and without an ultrathin 0.7 nm Ge₃N₄ dielectric.Reference Lieten, Degroote, Kuijk and Borghs²²

In cases where no barrier was observed, the barrier height is estimated to be less than 0.3 eV.

Next, Nishimura et al.Reference Nishimura, Kita and Toriumi²³ explored the use of thin oxides rather than nitrides for the MIS contact on n-type and p-type Ge(100) substrates, studied the effect of oxide thickness on barrier height, and successfully fabricated a Ge SB-FET. For contact fabrication, after native oxide removal, GeO_x and AlO_x were radio frequency sputtered at room temperature and then annealed at 400°C in N₂.

From the current-voltage electrical characterization shown in Figure 5, as the oxide thicknesses is increased from 0 to 2.2 nm, n-Ge diode behavior was transformed from rectifying to ohmic, while p-Ge diode behavior was transformed from ohmic to rectifying. As expected, the majority of the change is seen through the reverse-biased current, since carriers moving from metal to semiconductor are typically more affected by the barrier height than carriers moving from semiconductor to metal. It is important to note that without a reduction in Φ_B,eff, the reverse current of the n-Ge MIS contact would not increase with oxide thickness. For the p-Ge MIS contact, the reverse current is interestingly asymmetrically suppressed by the oxide, which differs from the typical tunneling-limited current behavior that would reduce the current in both forward and reverse biases. This is due to the Fermi-level pinning of Ge close to the valence band, whereby most metals form ohmic contacts and a low Schottky barrier to p-Ge. However, after use of the oxide to depin the Fermi level, rectifying behavior can be achieved.

Figure 5.

Current-voltage characteristics for Al/GeO_x/Ge diodes.Reference Nishimura, Kita and Toriumi²³ The effect of varying the GeO_x thickness is shown in different curves, with the thickness indicated in nm. (a) For n-Ge, the reverse bias current increases with GeO_x thickness, indicating a reduction of the barrier height. The inset shows the current-voltage curve for a GeO_x thickness of 2.2 nm on a linear scale, emphasizing the achieved ohmic behavior. (b) For p-Ge, the current is asymmetrically suppressed by the oxide, indicating a depinned Fermi level. The inset shows the current-voltage on a linear scale for a GeO_x thickness of 1.6 nm, demonstrating rectifying behavior. Reprinted with permission from Reference 23. ©2008, The Japan Society of Applied Physics.

The change of barrier height with oxide thickness summarized in Table II supports the MIGS model, where the presence of the oxide suppresses the penetration of the metal electron wave function tail into the Ge. However, the roughly same Φ_B,eff of 0.45 eV extracted for Al (Φ_M = 4.1 eV) and Au (Φ_M = 5.1 eV) despite a 1.0 eV difference in metal work function again suggests that Fermi-level pinning is just reduced, not removed. Furthermore, a Φ_B,eff of 0.44–0.46 eV was found for both n-type and p-type Ge, where if there was true Fermi-level depinnining, the barrier heights should add up to be the bandgap (Φ_BN + Φ_BP = E _g).

Table II.

Summary of effective barrier heights (ϕB, eff) for Al (Φ_M = 4.1 eV) and Au (Φ_M = 5.1 eV) metal-insulator-semiconductor contacts for varying thicknesses of GeO_x.Reference Nishimura, Kita and Toriumi²³

Ohmic denotes cases where the on/off current ratio at ± 1V is less than 10.

Kobayashi et al.Reference Kobayashi, Kinoshita, Saraswat and Wong²⁴ further explored the MIS structure though the use of a thin radio frequency sputtered silicon nitride (SiN) layer and reported the lowest barrier height of 0.05 eV on Er/SiN/Ge, reduced from the Er/Ge Schottky barrier of 0.45 eV. In addition to Φ_B,eff measurements, the contact resistance (R _CO) as a function of the insulator thickness (t _INS) was studied, where for Al/SiN/Ge, the minimum R _CO was found for a dielectric thickness of 2 nm. Figure 6 depicts the modeling of R _CO as two resistances in series: (1) R _T, a tunneling resistance through the insulator, and (2) R _SB, a resistance associated with the barrier. At t _INS = 0 with no insulator present, the highly pinned Schottky barrier causes R _CO to be dominated by R _SB. Once a thin insulator is inserted and Φ_B,eff begins to reduce, then R _SB and thus R _CO also begin to decrease. However, as t _INS is further increased, the current through the MIS eventually becomes tunneling limited, whereby the increasing R _T starts to dominate R _CO. The overall R _CO versus t _INS curve (Figure 7) is a tradeoff between reduced Φ_B,eff and increased R _T, where there exists an optimal t _INS for minimal R _CO.

Figure 6.

Schematic of contact resistance, R _CO, versus insulator thickness, t _INS. There exists an optimal insulator thickness for minimal contact resistance, which arises from the tradeoff between a reduced barrier (R _SB branch) and an increased tunneling resistance (R _T branch).

Figure 7.

Measured contact resistance R _CO versus SiN thickness t _INS for the Al/SiN/Ge metal-insulator-semiconductor diode.Reference Kobayashi, Kinoshita, Saraswat and Wong²⁴ The minimum R _CO occurs at 2 nm. Reprinted with permission from Reference 24. ©2008, American Institute of Physics.

Through these various examples of Ge contacts, it is demonstrated that the MIS contact structure has great flexibility, where there are many more possible metal and dielectric combinations. As Kobayashi et al.Reference Kobayashi, Kinoshita, Saraswat and Wong²⁴ showed, the optimal dielectric thickness changes with both materials. The chosen dielectric affects both how much the Φ_B,eff is reduced, which changes the shape of the R _SB branch, and determines the band offset that will shift the R _T branch left or right.

MIS contact to III–V semiconductors

Hu et al.Reference Hu, Guan, Saraswat and Wong^25, Reference Hu, Saraswat and Wong²⁶ have investigated the MIS contact structure on III–V semiconductors by using sputtered SiN and atomic layer deposition (ALD) Al₂O₃ on both GaAs and In_0.53Ga_0.47As. GaAs was primarily studied due to its large bandgap of 1.42 eV, which facilitates Φ_B,eff extraction, and also as a baseline III–V material to develop a contact structure that can be extended to other more technologically relevant III–V materials. For the MIS contact study, as in the Ge case, a lightly doped GaAs substrate with a doping density of 2 × 10¹⁶ cm^–3 was used to emphasize the thermionic emission current and changes in Φ_B,eff.

For GaAs, the native oxide forms a low density, high surface states interface that causes strong Fermi-level pinning, and so great care needs to be taken in minimizing the formation of native oxide during contact fabrication. Native oxide removal using dilute HCl followed by sulfur passivation in ammonia sulfide (NH₄)₂S has been shown to terminate with Ga–S and As–S bonding, which helps prevent further oxidation.Reference Chen, Sun and Nishi²⁷ For the MIS contact, immediately following sulfur passivation, amorphous SiN was deposited at 200°C through wafer biased radio frequency sputtering from a stochiometric Si₃N₄ target. The wafer bias and heat are critical, since without the two, the resulting SiN film is less dense and uniform and does not reduce the Fermi-level pinning. For the aluminum oxide samples, the ALD Al₂O₃ was deposited using trimethylaluminum (TMA) and H₂O precursors at 300°C. It is also crucial to start the ALD process with the TMA pulse, which is necessary for the “self-cleaning” effect on the III–V native oxide, where As₂O₃ and GaO are removed through a ligand exchange process.Reference Hinkle, Sonnet, Vogel, McDonnell, Hughes, Milojevic, Lee, Aguirre-Tostado, Choi, Kim, Kim and Wallace²⁸

Figure 8 illustrates the same contact resistance and dielectric thickness tradeoff also found in the Ge MIS contacts. The existence of a minimum contact resistance for a non-zero dielectric thickness confirms the reduction in barrier height. In comparing the dielectrics, it is clear that SiN is the better option of the two, and suggests that it may be possible to achieve even lower contact resistance with the use of alternative dielectrics. It also highlights the large effect the conduction band (∆E _C) and valence band (∆E _V) offsets have on the tunneling resistance R _T in the MIS structure for n-type and p-type semiconductors. The band offsets of Al₂O₃ (∆E _C = 2.75 eV) and SiN (∆E _C = 1.5 eV) to GaAs differ by 1.25 eV, but the intrinsic exponential dependence of the tunneling current on the potential barrier amplifies this difference. The effect of the dielectric on R _SB depends on the amount of reduction in Φ_B,eff, so the ideal dielectric would be one that has a larger ∆Φ_B,eff and zero or even negative band offset (∆E _C for n-type and ∆E _V for p-type) to reduce the tunneling penalty on R _C.

Figure 8.

Comparison of the contact resistance, R _CO, versus insulator thickness, t _INS, tradeoff for SiN and Al₂O₃, where the contact resistance ratios are taken relative to the Schottky diode case. SiN appears to be the better candidate for contact applications due to its lower ∆E _C of 1.5 eV, which is reflected in the reduced tunneling resistance at a given insulator thickness. Reprinted with permission from Reference 26. ©2010, American Institute of Physics.

Through varying Φ_M from Y (Φ_M = 3.1eV) to W (Φ_M = 4.5eV) on the MIS contact using SiN, the authors find that the optimal thickness is inversely dependent upon the metal work function. The lowest achievable contact resistance also has a dependence on Φ_M that arises mainly from the band alignment of the metal with the dielectric, which affects the tunneling barrier from metal to semiconductor. In studying the effect of substrate doping, it was found that there is a slightly wider t _SiN process window for higher doped substrates. The reasoning lies in the reduction of the depletion width with higher doping, which causes the Schottky barrier tip to become thinner. The R _T curve effectively shifts toward the left, and the R _SB curve shifts toward the right due to increased tunneling current from a thinner tunneling barrier. Figure 9 summarizes how changing the various material parameters affects the overall R _CO versus t _INS tradeoff. For an ultralow contact resistance, a combination of high electrically active doping and low effective barrier heights is necessary.

Figure 9.

Schematic of contact resistance, R _CO, versus insulator thickness, t _INS. The effect of different metals, dielectrics, and substrates on the tradeoff between R _CO and insulator thickness is shown, where R _T is the tunneling resistance through the insulator, and R _SB is the barrier-related resistance. The figure shows that the tunneling resistance will be suppressed for higher substrate doping, smaller band offset between dielectric and substrates, and lower metal work functions (Φ_M).

As mentioned earlier in this article, the mechanism of this observed reduction in barrier height is not yet fully understood. MIGS has been cited as a reason, however, MIGS has an asymptotic charge decay length λ of 3Å for GaAs and 4Å for Ge, which implies that for any sufficiently thick dielectric, all the MIGS should be blocked, and the Fermi level should be depinned. However, complete Fermi-level depinning is not observed in both Ge and GaAs, as the barrier heights are not completely tuned by the metal work function. On the other hand, the presence of an electronic dipole formed based on differences in oxygen density is also cited as a possibility. Figure 10 summarizes the measured changes in the Φ_B,eff of Schottky diodes with varying Φ_M, with and without the use of SiN. In particular, for a metal/SiN/GaAs contact, the approximately constant reduction of Φ_B,eff by roughly 0.4 eV for all samples regardless of Φ_M suggests the presence of a dielectric dipole with a magnitude between 0.4 to 0.5 eV. Nonetheless, for a more thorough understanding, an even wider range of dielectrics and metals needs to be studied, and Hu et al.Reference Hu, Saraswat and Wong²⁶ suggest a series of experiments that could be used to help determine the underlying mechanism.

Figure 10.

Effective barrier height versus metal work function for Schottky diodes and metal-insulator-semiconductor contacts. The roughly parallel shift in Φ_B,eff independent of Φ_M confirms the dielectric dipole induced shift of roughly 0.4 to 0.5 eV. Reprinted with permission from Reference 26. ©2010, American Institute of Physics.