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Digital predistortion of envelope-tracking power amplifiers under average power back-off and long-term average power efficiency for base-station applications

Published online by Cambridge University Press:  18 February 2013

Jonmei J. Yan*
Affiliation:
ECE Department, University of California, San Diego, 9500 Gilman Dr. 0407, La Jolla, CA, USA MaXentric Technologies, La Jolla, CA, USA
Paul Draxler
Affiliation:
ECE Department, University of California, San Diego, 9500 Gilman Dr. 0407, La Jolla, CA, USA Qualcomm Inc., San Diego, CA, USA
Calogero D. Presti
Affiliation:
ECE Department, University of California, San Diego, 9500 Gilman Dr. 0407, La Jolla, CA, USA
Donald F. Kimball
Affiliation:
ECE Department, University of California, San Diego, 9500 Gilman Dr. 0407, La Jolla, CA, USA MaXentric Technologies, La Jolla, CA, USA
Peter M. Asbeck
Affiliation:
ECE Department, University of California, San Diego, 9500 Gilman Dr. 0407, La Jolla, CA, USA
*
Corresponding author: Jonmei J. Yan Email: jyan@ieee.org
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Abstract

In many base-station applications, the load/usage fluctuates over time periods of hours to days, thereby varying the required transmit power by as much as 10 dB. It is desirable to maintain high efficiency and linearity in the power amplifier under these back-off conditions in order to achieve high long-term efficiency. This paper demonstrates a scalable digital predistortion (DPD) approach that can be applied under different power back-off levels in envelope-tracking (ET) amplifiers and quantifies the associated efficiency. Efficiency comparisons are made with other amplifier configurations such as Class B and Doherty. Efficiency of 60% at full power (35 W average power) and >30% efficiency at 10 dB average power back-off are measured in an ET amplifier with a 7.54 dB peak-to-average ratio (PAPR) single-carrier WCDMA signal while meeting linearity specifications. Long-term base-station usage probability functions are presented. The long-term efficiency of the ET amplifiers is simulated to be greater than that of Class B and Doherty amplifiers.

Information

Type
Research Papers
Copyright
Copyright © Cambridge University Press and the European Microwave Association 2013
Figure 0

Fig. 1. LEFT: ET high-power amplifier system block diagram. RIGHT: Normalized Vdd versus normalized input voltage at the different back-off levels.

Figure 1

Fig. 2. LEFT: Relationship surface between output power, input voltage, and drain supply voltage of an RFPA. The ET-HPA follows a single trajectory as depicted by the blue line; RIGHT: PDF of the modulated 7.54 dB PAPR WCDMA signal at 0 dB and at −7 dB back-off.

Figure 2

Fig. 3. AM–AM and AM–PM plots – LEFT: before DPD at 0 dB (blue) and 7 dB (red) average power back-off and the corresponding extracted behavioral model, using a polynomial fit; – RIGHT: after DPD at 9 dB average power back-off with derived LUT.

Figure 3

Table 1. Summary of measured linearity results at various back-offs.

Figure 4

Fig. 4. LEFT: Average efficiency of various PAs using a 7.54 dB PAPR WCDMA signal versus average output power; RIGHT: Left axis: “Instantaneous” efficiency versus normalized Pout of the measured ET-HPA and comparison PAs. Right axis: PDFs of a 7.54 dB WCDMA signal.

Figure 5

Fig. 5. LEFT: PDF of the number of users over a 24-h period in a given cell with 128 maximum number of users. (INSERT: Normalized traffic versus time over 24-h period); RIGHT: PDF of average output power in a 40 W base-station based on the traffic profile.

Figure 6

Table 2. Energy usage of a base-station over 24 h period.