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Significant measureable development of inductance gain per unit of space in loop fractals

Published online by Cambridge University Press:  24 March 2015

Mohammad Alibakhshi-Kenari*
Affiliation:
Electrical and Communication Engineering Department of Shahid Bahonar University, Kerman-Iran
*
Corresponding author: M. Alibakhshi-Kenari Email: Naeem.alibakhshi@yahoo.com
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Abstract

A significant measureable development of inductance gain per unit of space in loop fractals for a suite of inductors which occupy the same layout space and require only a single-fabrication layer is investigated. All structures are fabricated on a borofloat glass substrate with dielectric constant loss tangent of 0.004. A chrome layer of 30 nm for adhesion followed by a 180 nm gold layer were sputtered and etched. To increase the surface area is implemented a simple geometrical strategy through fractalization and consequently the inductive performances is improved. Also, the higher fractal orders can be developed the inductive performance over 9 times from 0th to 3rd order. The fractal derivations of the original loop due to its space filling properties are examined and it suggests that although the effective electrode length increases, overall, the arrangement still essentially occupies the same space. In terms of design space for 0th, 3O-5O-7O of 1st, 2nd, and 3rd orders of fractals, 0, 26.2, 34.6, 38.6, 65.5, and 75.8% of occupied conductor surface area are saved. The measured inductances and resistances for aforementioned orders of fractals are 4.6 nH and 5 Ω, 8.6 nH and 10.5 Ω, 12 nH and 11.6 Ω, 12.8 nH and 17.3 Ω, 19.2 nH and 23.2 Ω, and 44.7 nH and 63.5 Ω, respectively.

Information

Type
Online Only Papers
Copyright
Copyright © Cambridge University Press and the European Microwave Association 2015 
Figure 0

Fig. 1. (a) The fabricated base inductor and dimensional definitions; the set of 1st order structures in “pseudo-series” consisting of (b) 3 bases, (c) 5 bases, (d) 7 bases, (e) the 2nd order fractal (f) the fabricated 3rd order fractal based on the 1st – 3O structure, and (g) an example of a control (ctrl) structure: shown is the 3rd order series equivalent consisting of 27 base copies placed in series.

Figure 1

Table 1. Raw inductance, resistance, and relative conductor area-saving ratings.

Figure 2

Fig. 2. Measured L and R gain plot of all structures studied comparing normalized inductance to normalized resistance. Here, the null gain line represents no tradeoffs between resistance and inductance; points that fall in the lower diagonal represents an inductance gain that is greater than resistance for a given structure. The dashed line emphasizes the L and R progression with respect to the original fractals. The inset magnifies and highlights the structures exhibiting an inductance gain; in particular, “wide” tag denotes that the electrode width was double (2H) that of the original fractal; the “paths” tag denotes the number of geometrically identical paths placed in parallel with each other.

Figure 3

Table 2. Dimensional properties, self-inductance Lself, mutual inductance M and IG-FOM G for the original O and doubled-width W structures.

Figure 4

Fig. 3. Measured sheet resistance and inductance per square analysis for each fractal order extracted from (a) the original structures and its equivalent series layout (control); and, (b) with electrode width doubled from the original. Here, smaller black bars and larger checkered bars mean higher inductance per square area of resistance.

Figure 5

Fig. 4. Photograph of the facility and the workshop at which the inductors were fabricated and tested.