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Optimal design of a wireless power transfer link using parallel and series resonators

Published online by Cambridge University Press:  30 August 2016

Giuseppina Monti*
Affiliation:
Department of Engineering for Innovation, University of Salento, Lecce, Italy. Phone: +39 0832 29 7365
Alessandra Costanzo
Affiliation:
Department of Electrical, Electronic and Information Engineering, University of Bologna, Bologna, Italy
Franco Mastri
Affiliation:
Department of Electrical, Electronic and Information Engineering, University of Bologna, Bologna, Italy
Mauro Mongiardo
Affiliation:
Department of Engineering, University of Perugia, Perugia, Italy
*
Corresponding author: G. Monti Email: giuseppina.monti@unisalento.it

Abstract

The optimal design problem for a wireless power transfer link based on a resonant inductive coupling is addressed in this paper. It is assumed that the magnetic coupling coefficient and the inductor quality factors are known. By employing the conjugate image impedances, the values of the inductances realizing the optimal design with respect to given values of the network input and load impedances are derived. It is demonstrated that there is just one optimal design maximizing both the power delivered to the load and the power transfer efficiency of the link. The four possible schemes corresponding to the use of a parallel or a series arrangement for the two coupled resonators (Parallel-Parallel, Series-Series, Parallel-Series, and Series-Parallel) are considered and discussed. Closed form analytical formulas are derived and validated by circuital simulations.

Information

Type
MMS Special Issue
Copyright
Copyright © Cambridge University Press 2016 
Figure 0

Fig. 1. Schematic representation of the problem is analyzed in this paper. A reciprocal two-port network represented by its impedance matrix Z is considered. The goal is determining the network parameters realizing the optimal design for given values of the input impedance Zin and of the load resistance RL.

Figure 1

Fig. 2. Conjugate image impedances as defined in [21] (see Fig. 3 of [21]). Upper figure: when port 2 is terminated on Zc2 the input impedance seen from port 1 is $Z_{c1}^* $ (the asterisk denotes the complex conjugate). Similarly, in the lower figure, when port 1 is terminated on Zc1 the input impedance seen from port 2 is $Z_{c2}^* $.

Figure 2

Fig. 3. Schematic representation of a two-port network described by its impedance matrix Z with compensating reactances on port 1 and 2. It is assumed that the conjugate image impedances of the network are Zc1 = Rc1 + jXc1 and Zc2 = Rc2 + jXc2. By adding the compensating reactance Xc1 on port 1 and Xc2 on port 2, we obtain a network that, when terminated on the resistive impedance Rc2, presents a resistive input impedance Rc1.

Figure 3

Fig. 4. Schematic of a WPT link using a resonator with a parallel arrangement on the primary side and a resonator with a series arrangement on the secondary side.

Figure 4

Fig. 5. Equivalent circuit of the WPT link.

Figure 5

Fig. 6. A series inductance L1 has been added on the primary side in order to realize a real conjugate image impedance.

Figure 6

Fig. 7. Possible schemes for coupled resonators. (a) SS configuration, (b) PP configuration, (c) SP configuration, and (d) PS configuration. The case of ideal resonators with zero-losses (i.e. the case where R1 and R2 are equal to zero) is depicted.

Figure 7

Table 1. Conjugate image impedances at port 1 (Zc1) and port 2 (Zc2). Inductance values for given  Ro,  RL.

Figure 8

Fig. 8. Inductances realizing the optimal design for different values of the coupling coefficient k. The following values have been assumed: Q1 = Q2 = 100, Ro = RL = 50 Ω; while k is varied between 0 and 1. LS is the inductance necessary in the case of a resonator using a series configuration, while LP is the inductance necessary in the case of a resonator using a parallel configuration.

Figure 9

Table 2. Numerical example analyzed in Section VI.

Figure 10

Table 3. Values of the parameters realizing the optimal design for the example are given in Table 2.

Figure 11

Fig. 9. Power on the load and efficiency for the example of Table 2; it is assumed that a 1 V (peak amplitude value) voltage generator is on port 1 and that the load is on port 2. The results obtained by circuit simulations by varying the value of the inductance L1 are reported; the value of C1 is also varied according to the formula $C_1 = 1/(\omega _0^2 L_1)$. It can be seen that PL is maximized for L1 = 0.587 μH, while the efficiency η is insensitive from L1.

Figure 12

Fig. 10. Power on the load and efficiency for the example of Table 2; it is assumed that a 1 V (peak amplitude value) voltage generator is on port 1 and that the load is on port 2. The results obtained by circuit simulations by varying the value of the inductance L2 are reported; the value of C2 is also varied according to the formula $C_2 = 1/(\omega _0^2 L_2)$. It can be seen that both PL and η are maximized for L2 = 2.347 μH.

Figure 13

Fig. 11. Efficiency for the example of Table 2 calculated by circuit simulations by varying the value of the inductance L1 are reported; the value of C1 is also varied according to the formula $C_1 = 1/(\omega _0^2 L_1)$. It is assumed that a 1 V (peak amplitude value) voltage generator is on port 1 and that the load is on port 2. The results obtained with and without the series compensating inductance L1 are reported.

Figure 14

Fig. 12. Power on the load for the example of Table 2 calculated by circuit simulations by varying the value of the inductance L1 are reported; the value of C1 is also varied according to the formula $C_1 = 1/(\omega _0^2 L_1)$. It is assumed that a 1 V (peak amplitude value) voltage generator is on port 1 and that the load is on port 2. The results obtained with and without the series compensating inductance L1 are reported.

Figure 15

Fig. 13. Efficiency for the example of Table 2 calculated by circuit simulations by varying the value of the inductance L1 are reported; the value of  C1 is also varied according to the formula $C_1 = 1/(\omega _0^2 L_1)$. It is assumed that a 1 V (peak amplitude value) voltage generator is on port 2 and that the load is on port 1. The results obtained with and without the series compensating inductance L1 are reported. The maximum value calculated for the case where the compensating inductance L1 is not present is 0.956, while the one obtained when L1 is present is 0.961.

Figure 16

Fig. 14. Power for the example of Table 2 calculated by circuit simulations by varying the value of the inductance L1 are reported; the value of C1 is also varied according to the formula $C_1 = 1/(\omega _0^2 L_1)$. It is assumed that a 1 V (peak amplitude value) voltage generator is on port 2 and that the load is on port 1. The results obtained with and without the series compensating inductance L1 are reported.