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An efficient W-band InP DHBT digital power amplifier

Published online by Cambridge University Press:  14 March 2017

Andreas Wentzel*
Affiliation:
Ferdinand-Braun-Institut (FBH), Leibniz-Institut für Höchstfrequenztechnik, Gustav-Kirchhoff-Str. 4, Berlin, 12489, Germany
Maruf Hossain
Affiliation:
Ferdinand-Braun-Institut (FBH), Leibniz-Institut für Höchstfrequenztechnik, Gustav-Kirchhoff-Str. 4, Berlin, 12489, Germany
Dimitri Stoppel
Affiliation:
Ferdinand-Braun-Institut (FBH), Leibniz-Institut für Höchstfrequenztechnik, Gustav-Kirchhoff-Str. 4, Berlin, 12489, Germany
Nils Weimann
Affiliation:
Ferdinand-Braun-Institut (FBH), Leibniz-Institut für Höchstfrequenztechnik, Gustav-Kirchhoff-Str. 4, Berlin, 12489, Germany
Viktor Krozer
Affiliation:
Ferdinand-Braun-Institut (FBH), Leibniz-Institut für Höchstfrequenztechnik, Gustav-Kirchhoff-Str. 4, Berlin, 12489, Germany
Wolfgang Heinrich
Affiliation:
Ferdinand-Braun-Institut (FBH), Leibniz-Institut für Höchstfrequenztechnik, Gustav-Kirchhoff-Str. 4, Berlin, 12489, Germany
*
Corresponding author: A. Wentzel Email: andreas.wentzel@fbh-berlin.de
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Abstract

This paper presents for the first time high-efficiency W-band power amplifiers (PAs), the design of which follows the digital PA (DPA) design concept. Two DPAs with different output networks have been realized: a single-band version (S-DPA) for 95 GHz and a dual-band design (D-DPA) for signal frequencies fS of 68 GHz (first band) and 76 GHz (second band), respectively. The PAs are realized as monolithic microwave-integrated circuits (MMICs) in a 0.8 μm InP DHBT transferred-substrate process. They utilize a double-emitter-finger DHBT unit cell with an emitter area of 2 × 0.8 × 6 μm3 each. In contrast to the usual W-band PAs, the proposed single-stage amplifier MMICs do not apply any special reactive matching for the transistor, which leads to very compact chip sizes of 0.27 mm2 (S-DPA) and 0.39 mm2(D-DPA). The S-DPA includes one band-pass filter (BPF) at the output with 0.6 dB insertion loss (IL) and 24 dB input return loss (RL) at the signal frequency of 95 GHz. The dual-band BPF shows 0.7 dB IL in both bands with a RL of more than 21 dB each. Applying an overdriven sinusoidal input signal to emulate digital operation the DPAs achieve a maximum output power of 14.4 dBm and power-added efficiency of 31% when using the single-band configuration. Collector efficiencies of more than 80% and the flexible multi-band operation demonstrated prove the great potential of the digital PA concept for future high-speed communications.

Information

Type
Research Papers
Copyright
Copyright © Cambridge University Press and the European Microwave Association 2017 
Figure 0

Fig. 1. Principle of DPA, including PA stage and analog output filter.

Figure 1

Fig. 2. Cross-section of transferred-substrate InP DHBT MMIC technology used for realized digital PA MMIC.

Figure 2

Fig. 3. (a) Schematic representation of realized single-band digital PA MMIC, including collector bias feed, BPF, and matching to 50 Ω for 95 GHz; (b) Photograph of fabricated InP DHBT S-DPA MMIC for 95 GHz; chip area (w/pads): 0.51 × 0.53 mm2.

Figure 3

Fig. 4. (a) Schematic representation of realized D-DPA MMIC including collector bias feed, dual-band filter and matching to 50 Ω; (b) Photograph of fabricated D-DPA, chip area (w/pads): 0.46 × 0.85 mm2.

Figure 4

Fig. 5. Simulated and measured S-parameters (0.05–110, 140–220 GHz) of single-band BPF, including matching and collector bias feed line, Pin = −23 dBm; detail: realized BPF MMIC including matching and collector bias feed line; chip area (w/o pads): 0.3 × 0.3 mm2.

Figure 5

Fig. 6. Measured S-parameters (0.05–110, 140–220 GHz) of dual-band BPF including matching and collector bias feed line, Pin =  23 dBm; detail: realized dual-band pass filter MMIC; chip area (w/o pads): 0.7 × 0.3 mm2.

Figure 6

Fig. 7. Measured S-parameters (0.05–110 GHz) of realized S-DPA; Pin = −23 dBm; bias: IB = 0.7 mA, VC = 2.7 V.

Figure 7

Fig. 8. Measured S-parameters (0.05–110 GHz) of realized D-DPA for frequency band 1 (input to output 80 in Fig. 4(a)) and band 2 (input to output 100 in Fig. 4(a)); Pin = −23 dBm; bias: IB = 0.7 mA, VC = 2.7 V.

Figure 8

Fig. 9. Measurement setup for large-signal characterization of proposed S- and D-DPAs.

Figure 9

Fig. 10. Measured output power (Pout), collector efficiency (ηC) and PAE of the S-DPA versus normalized input power (Pin); bias: VB = 0.85, VC = 1.6 V; Pin normalized to 12 dBm available source input power.

Figure 10

Fig. 11. Measured collector efficiency (ηC) and PAE of the S-DPA for varying collector voltages VC (1 to 2.7 V) and 8, 10, and 12 dBm input power versus output power (Pout); VB = 0.85 V.

Figure 11

Fig. 12. Measured collector efficiency (ηC) and PAE of the D-DPA at frequency “band 1” (input to “output80” in Fig. 4(a)) for varying collector voltages VC (1, 1.5, and 2.7 V) and 8, 10, and 12 dBm available source input power versus output power (Pout); VB = 0.85 V; fS = 68 GHz.

Figure 12

Fig. 13. Measured collector efficiency (ηC) and PAE of the D-DPA at frequency “band 2” (input to “output100” in Fig. 4(a)) for varying collector voltages VC (1, 1.5, and 2.7 V) and 8, 10, and 12 dBm available source input power versus output power (Pout); VB = 0.85 V; fS = 76 GHz.

Figure 13

Table 1. Summary of recent W-band PAs.