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Design and characterization of an integrated microwave generator for BIST applications

Published online by Cambridge University Press:  27 February 2014

Imene Lahbib*
Affiliation:
NXP Semiconductors, 14906 Caen Cedex 09, France. Phone: +33 2 31 45 60 79 LaMIPS, Laboratoire commun UMR CNRS 6508-NXP-PRESTO, 14050 Caen, France
Mohamed Aziz Doukkali
Affiliation:
LaMIPS, Laboratoire commun UMR CNRS 6508-NXP-PRESTO, 14050 Caen, France
Philippe Descamps
Affiliation:
LaMIPS, Laboratoire commun UMR CNRS 6508-NXP-PRESTO, 14050 Caen, France
Patrice Gamand
Affiliation:
NXP Semiconductors, 14906 Caen Cedex 09, France. Phone: +33 2 31 45 60 79
Christophe Kelma
Affiliation:
NXP Semiconductors, 14906 Caen Cedex 09, France. Phone: +33 2 31 45 60 79
Olivier Tesson
Affiliation:
NXP Semiconductors, 14906 Caen Cedex 09, France. Phone: +33 2 31 45 60 79 LaMIPS, Laboratoire commun UMR CNRS 6508-NXP-PRESTO, 14050 Caen, France
*
Corresponding author: I. Lahbib Email: imene.lahbib_2@nxp.com
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Abstract

This paper presents a circuit architecture for a new integrated on chip test method for microwave circuits. The proposed built-in-self-test (BIST) cell targets a direct low-cost measurement technique of the gain and the 1 dB input compression point (CP1) of a K-band satellite receiver in the 18–22 GHz frequency bandwidth. A signal generator at the radiofrequency (RF) front end input of the device under test (DUT) has been integrated on the same chip. To inject this RF signal, a loopback technique has been used and the design has been accommodated for it. This paper focuses on the design of the most sensitive block of the BIST circuit, i.e. the RF signal generator. This circuit, fabricated in a SIGe:C BiCMOS process, consumes 10 mA. It presents a dynamic power range of 17 dB (−41; −24 dBm) and operates in a frequency range of 5.6 GHz (17.5; 23 GHz). This BIST circuit gives new perspectives in terms of test strategy, cost reduction, and measurement accuracy for microwave-integrated circuits and could be adapted for mm-wave circuits.

Information

Type
Articles Selected from the 2013 National Microwave Days in France
Copyright
Copyright © Cambridge University Press and the European Microwave Association 2014 
Figure 0

Fig. 1. (a) Concept of the proposed BIST approach and (b) frequency planning of the DUT.

Figure 1

Fig. 2. BIST architecture.

Figure 2

Fig. 3. (a) The BIST LC-VCO circuit and (b) the BIST variable attenuator circuit.

Figure 3

Fig. 4. (a) Layout topology of the DUT including the BIST circuit and (b) representation of a point (M) in the plane (x, y) such that d >> the coil's radius R.

Figure 4

Fig. 5. (a) The BIST oscillation frequency versus the control voltage of the BIST oscillator and (b) the BIST power versus the control voltage of the BIST attenuator.

Figure 5

Fig. 6. (a) Measured gain, CP1 at 21.6 GHz and (b) measured input reflection coefficient of the DUT for the BIST circuit ON/OFF.

Figure 6

Fig. 7. Measurement of the receiver's gain with the loopback technique.