Hostname: page-component-74656f9884-c52kr Total loading time: 0 Render date: 2026-11-06T22:21:22.639Z Has data issue: false hasContentIssue false

Constructive memory for situated design agents

Published online by Cambridge University Press:  08 April 2005

PAK-SAN LIEW
Affiliation:
Key Centre of Design Computing and Cognition, School of Architecture, Design Science and Planning, University of Sydney, Chippendale, NSW 2006, Australia
JOHN S. GERO
Affiliation:
Key Centre of Design Computing and Cognition, School of Architecture, Design Science and Planning, University of Sydney, Chippendale, NSW 2006, Australia
Rights & Permissions [Opens in a new window]

Abstract

Design is situated. “Situatedness” in designing entails the explicit consideration of the state of the environment, the knowledge and experiences of the designer, and the interactions between the designer and the environment during designing. Central to the notion of situatedness is the notion of design situation and constructive memory. A design situation models a particular state of interaction between a design agent and the environment at a particular point in time. Memory construction occurs whenever a design agent uses past experiences and knowledge within the current design environment in a situated manner. This paper is concerned with the development of an agent-based computational design tool that takes into consideration the notion of situatedness in designing. A key element of this tool is a constructive memory system that supports the dynamic nature of designing. Memories of past experiences are constructed as required by the current situation, and past experiences are refined for future utility according to the current interactions between the agent and the environment. This latter case of knowledge improvement is illustrated through a series of experiments that demonstrates the effect of grounding on the operating modes and responses of a constructive memory system.

Information

Type
Research Article
Copyright
© 2004 Cambridge University Press
Figure 0

The model of constructive memory (adapted from Gero, 1999a). The number of levels for LTM and STM is not limited to those shown.

Figure 1

Processes connecting different constituents of a design experience.

Figure 2

A sample of mechanical assemblies.

Figure 3

The conceptual architecture of a general computational memory system within a situated design agent; numbered paths are indicated as (#) in the text, where (#) is the number as shown in the diagram.

Figure 4

Representations of design experiences within an IAC network; negative links connecting property nodes within the same property group are not shown.

Figure 5

The IAC network before and after various forms of constructive learning.

Figure 6

The demarcation of STM and LTM. The number of levels for STM and LTM is not limited to those shown.

Figure 7

The initial design experiences processed by the agent; the last experience is different from the rest to allow the demonstration of different behaviors through the grounding of a totally unrelated experience.

Figure 8

The initial design experiences processed by the agent; the last experience is different from the rest to allow the demonstration of different behaviors through the grounding of a totally unrelated experience.

Figure 9

The initial design experiences processed by the agent; the last experience is different from the rest to allow the demonstration of different behaviors through the grounding of a totally unrelated experience.

Figure 10

Different states of the memory system for Experiment 1, Run 1.

Figure 11

Different states of the memory system for Experiment 1, Run 2.

Figure 12

Different states of the memory system for Experiment 2, Run 1 and Experiment 4, Run 1.

Figure 13

Different states of the memory system for Experiment 2, Run 2.

Figure 14

Different states of the memory system for Experiment 3, Run 1. Memory State 4 is repeated in the bottom row to show the continuation from the top.

Figure 15

Memory States 0–5 of the system for Experiment 3, Run 2. Memory State 3 is repeated in the bottom row to show the continuation from the top.

Figure 16

Memory States 5–7 of the system for Experiment 3, Run 2. Memory State 5 is repeated in the top row to show the continuation from the previous diagram (Fig. 14), and Memory State 6 is repeated in the bottom row to show the continuation from the top row of the current figure.

Figure 17

Different states of the memory system for Experiment 4, Run 2. Memory States 3 and 5 are repeated in the bottom row to show the continuation from the top row.

Figure 18

Different states of the memory system for Experiment 5, Run 1.

Figure 19

Memory States 0–6 of the system for Experiment 5, Run 2. Memory State 3 is repeated in the bottom row to show the continuation from the top row of the current figure.

Figure 20

Memory States 6–10 of the system for Experiment 5, Run 2. Memory State 6 is repeated in the top row to show the continuation from the previous diagram (Fig. 18), and Memory State 8 is repeated in the bottom row to show the continuation from the top row of the current figure.