I. INTRODUCTION
Microwave (MW) wireless power transmission technology is based on MW power generation, transmission, and conversion. It has been applied to several applications with advantages, such as solar power satellites, surveillance platforms, wireless sensors, remotely powered vehicles, and radio-frequency identification (RFID) tags. Consequently, wireless power transmission over long distances with high efficiency is required in practice. Rectifiers are a key component of a MW wireless power transmission system. It is located at the receiving end whose MW–DC conversion efficiency is critical to the overall system efficiency.
There are numerous published reports on research involving rectifiers [Reference Brown1–Reference Chou, Lin, Weng and Li3]. With respect to the operating frequency band, they work at single frequency [Reference Lorenz4, Reference Liu, Guo, Sun and Xiao5], multi-frequency [Reference Jiang, Liu, Yu and Tan6–Reference Kuhn, Lahuec, Seguin and Person9], or broadband [Reference Song, Huang, Zhou, Zhang, Yuan and Carter10]. With respect to the topology structure, they work with single diode, dual diodes [Reference Ladan, Hemour and W u11–Reference Heikkinen and Kivikoski14], or diode arrays [Reference Zhang, Zhao, Yu, Huang and Liu15].
Current studies show that the optimal MW–DC conversion efficiency of a rectifier is related to the operating frequency band. In 1977, an aluminum bar-type rectenna made by Brown achieved more than 90% efficiency at S band [Reference Brown1]. Recent studies show that efficiency can reach up to 75% at C band [Reference Ren and Chang16, Reference Yu, Tan and Liu17]. A rectifier with single series diode achieves an efficiency of 71.9% at X band [Reference Shin, Seo, Choi, So and Cheon18], while it is 53 and 60% at Ka band in [Reference Chiou and Chen19, Reference Li and Wen20], respectively. The plotting of efficiency versus operating frequency of the state-of-the-art in the field of rectifiers is shown in Fig. 1. From Fig. 1, the highest conversion efficiencies are not the same at different frequencies. The general trend is that, as the operating frequency increases, the highest MW–DC conversion efficiency decreases. It is meaningful to make comparisons between rectifiers at the same operating frequency band.
Efficiency with respect to frequency of the state-of-the-art in the field of rectifiers.
In this paper, we present a novel voltage doubler rectifier operating at X band for a MW power transmission system. A detailed comparison between the proposed rectifier and relevant rectifiers is presented in Table 1. From Table 1, the majority of previous studies used Schottky diode as a rectifying device. The conversion efficiencies of diode-based rectifiers are usually higher than those of transistor- and Monolithic Microwave Integrated Circuit (MMIC)-based rectifiers. However, their input powers are lower. Among these diode-based rectifiers, the proposed rectifier not only achieves higher conversion efficiency, but also works at relatively higher power level, making it distinct from the previous work.
Comparison table of the proposed rectifier and related work at X band.
A theoretical analysis of diodes in voltage doubler rectifiers is presented based on the theory in [Reference Yoo and Changk25]. This model comprised a single diode and a parallel load resistance. The diode's characteristics were described by its SPICE parameters and the incident sine waveform to the rectifier. Valenta et al. [Reference Valenta, Morys and Durgin30] also modeled energy-conversion efficiency circuits using the one-diode model. It considered the conversion efficiency under high peak-to-average power ratio (PAPR) signals instead of a continuous waveform excitation. The duty cycle of a signal with intermittent transmission was taken into account in the derivation for the closed-form equations.
However, the models in references [Reference Yoo and Changk25, Reference Valenta, Morys and Durgin30] are not suitable for the analysis of a voltage doubler rectifier, which has two diodes, and the waveforms across them are different in the single diode condition. This paper will expand the one-diode model analysis further to voltage doubler model analysis. The excitation of a rectifier in a MW power transmission system is generally continuous waveform. Therefore, we use this excitation in the analysis rather than a high PAPR signal to meet the application in a MW power transmission system. The advantage of the analysis presented in this paper is its validity for a MW voltage doubler rectifier design. It offers a useful tool for rectifying efficiency prediction and circuit design.
II. THEORETICAL ANALYSIS
A typical block diagram of a rectifier is shown in Fig. 2. A low pass filter in front of the diode ensures that the fundamental frequency MW goes through and higher-order harmonics generated from the nonlinear diode are rejected back to the rectifying circuit. It could be eliminated due to the trade-off between the recycled power and the additional higher insertion loss in some designs [Reference Olgun, Chen and Volakis13]. A DC pass filter is applied to reject the harmonics and make the DC output voltage smooth. A matching network is used for transforming the circuit input impedance to be matched to the source. The design of impedance matching network is mainly focused on the diode, which has dynamic input impedance due to the nonlinearity.
Typical block diagram of a rectifier.
In the theoretical analysis presented in this paper, the filters and matching network are considered to be perfectly designed. The harmonics produced by the diodes during rectification are assumed to be recycled completely. There are no harmonics energy losses and insertion loss in the rectifying circuit. Consequently, the lumped-parameter model of a voltage doubler rectifier may be considered and analyzed without the input impedance matching network/filter, as shown in Fig. 3. The analysis of the characteristics of the diodes in this kind of circuit is as follows.
Lumped-parameter model of a voltage doubler rectifier.
A) Diode conduction angle
Figure 4 shows the MW voltage-current waveforms operating across the diode and its junction. The incident MW sine voltage is V p sinωt. The voltage across the diode is shown as
$$V_I = - V_T + V_P\sin \omega t,$$
where V T is the DC bias voltage across the diode, which is the combination of DC output voltage V D and diode conduction voltage V F . Here, V T = V D + V F .
Waveforms of voltage on diode and its junction, and curve of diode current-voltage characteristic.
The diodes in Fig. 3 are expressed by their equivalent circuit parameters as shown in Fig. 5. This model comprises a series resistance R s , a diode junction resistance R j , and a junction capacitance C j . RL is the load resistance. Power losses occur on both the series resistance and diode junction. Assuming that R j is close to zero in the conducting state and infinite in the cutoff state, the loss through diode junction has been neglected during the cutoff period because the current is zero.
Equivalent circuit model of the voltage doubler rectifier.
Due to the diode junction, V j lags behind V I by a slight order of ϕ as shown in Fig. 4, V j can be expressed as in equation (2). V j0 and V j1 are the DC and MW parts of the input voltage operating on the diode junction, respectively.
$$V_j = \left\{ {\matrix{ { - V_{j0} + V_{j1}\sin \left( {\omega t - \phi} \right),} \hfill & {{\rm diode}\;{\rm off}} \hfill \cr {V_F,} \hfill & {{\rm diode}\;{\rm on}} \hfill \cr} {\rm,}} \right.$$
θ i is the diode conduction angle. In one cycle, the diode is in the conducting state when θ ∈ [(π − θ i )/2, (π + θ i )/2] and in the cutoff state during the rest of the period. Applying Kirchhoff's law on the DC cycle in Fig. 5, we have equation (3).
$$V_F + 2I_DR_s + V_D + \bar V_j = 0,$$
where I D = V D /R L . Then, we obtain:
$$V_D = - \displaystyle{{V_{F} + {{\bar V}_j}} \over {1 + (2R_s/R_L)}}.$$
The DC output voltage is determined by diode forward conduction voltage V F and diode average junction voltage over one period:
$$\overline {V_j} = \displaystyle{1 \over {2\pi}} \left( {\int_{\pi - \theta _i/2}^{\pi + \theta _i/2} {V_Fd\theta} + \int_{\pi + \theta _i/2}^{5\pi - \theta _i/2} {\left( { - V_{j0} + V_{j1}\sin \theta} \right)d\theta}} \right).$$
The first item and the second item in the brackets represent the voltage integration during conduction and cutoff period, respectively. From (5), we achieve:
$$\overline {V_j} = \displaystyle{{\theta _i} \over {2\pi}} V_F + \displaystyle{{\theta _i - 2\pi} \over {2\pi}} V_{j0} - \displaystyle{{\sin (\theta _i/2)} \over \pi} V_{j1},$$
C j is charged when diode is cutoff. The charging current is
$$I_c = \displaystyle{{dC_jV_j} \over {dt}}.$$
Expand C j by Fourier series,
$$C_j = C_0 + C_1\sin \left( {\omega t - \phi} \right) + C_2\sin \left( {2\omega t - 2\phi} \right) + \cdots. $$
The higher-order harmonics are neglected according to the assumptions. Substitute (8) into (7),
$$I_c = \omega \left( {C_0V_{j1} - V_{j0}C_1} \right)\cos \left( {\omega t - \phi} \right).$$
When the diode is cutoff, we obtain:
$$V_I = V_j - I_cR_s.$$
$$\left\{ \matrix{V_{j0} = V_F + V_D \hfill \cr V_{j1} = V_p\cos \phi \hfill} \right.,$$
where ϕ is the phase difference between V I and V j , which is close to zero. When the diode switches from cutoff to on, V j = V F . Then,
$$- V_{j0} + V_{j1}\sin \left( {\displaystyle{\pi \over 2} + \displaystyle{{\theta _i} \over 2}} \right) = V_F.$$
Substituting V j0 and V j1 of (11) into (12), V P is expressed as:
$$V_P = \displaystyle{{2V_F + V_D} \over {\cos (\theta _i/2)}}.$$
$\bar V_j$
and V
D
are expressed by the given variables from (4), (6), (11), and (12). The conduction angle of the diode satisfies:
$$\tan \displaystyle{{\theta _i} \over 2} - \displaystyle{{\theta _i} \over 2} = \displaystyle{{2\pi R_s} \over {R_L(1 + (2V_F/V_D))}}.$$
This is a transcendental equation to obtain the conduction angle. It is determined by diode forward conduction voltage V F , series resistance R s , output DC voltage V D , and load resistance R L . Rs and V F are mainly determined by the diode characteristics, while V D and R L are mainly determined by the input power level.
B) Diode impedance
The diode dynamic input impedance is
$$Z\left( {\omega t} \right) = \displaystyle{{V_P} \over {I(\omega t)}},$$
$$I\left( {\omega t} \right) = \left \vert I \right \vert \sin \omega t - j\left \vert I \right \vert \cos \omega t.$$
The second item in (16) occurs only when the diode is in the cutoff state. The average current over one period is
$$\eqalign{ I =& \displaystyle{1 \over \pi} \left\{ {\int_{\pi - \theta _i/2}^{\pi + \theta _i/2} {\left \vert {\displaystyle{{V_I - V_F} \over {R_s}}} \right \vert \sin \omega td\theta}} \right. \cr & \left. {+\,j\int_{\pi + \theta _i/2}^{5\pi - \theta _i/2} {\left \vert {\displaystyle{{V_I - V_F} \over {R_s}}} \right \vert \cos \omega td\theta}} \right\}.} $$
For the first item in the brackets, V I will be substituted based on equation (1). The second item |V I − V F /R s |, will be replaced by the charging current I c . According to equations (2), (7), and (11), I c is
$$I_c = \omega C_jV_P\cos \left( {\omega t - \phi} \right).$$
Substituting V I and I c into (17),
$$\eqalign{& I = \displaystyle{{2V_F + V_{\rm D}} \over {2\pi R_s}}\left( { - 4\sin \displaystyle{{\theta _i} \over 2} + \displaystyle{{\theta _i + \sin \theta _i} \over {\cos (\theta _i/2)}}} \right) \cr & \quad + {\rm j}\displaystyle{{\omega C_j\left( {2V_F + V_D} \right)} \over {2\pi \cos (\theta _i/2)}}\left( {\pi - \displaystyle{{\theta _i} \over 2} + \displaystyle{{\sin \theta _i} \over 2}} \right).} $$
Then, the diode input impedance is as follows:
$$Z = \displaystyle{{2\pi R_s} \over {\theta _i - \sin \theta _i + j2R_s\omega C_j(\pi - (\theta _i/2) + \sin \theta _i/2)}}.$$
We assume that the circuit is well matched at input power and the optimal DC output voltage is 0.9 V br . The diode input impedance and conduction angle were calculated using (14) and (20). The results are shown in Fig. 6, and the diode parameters are listed in Table 2. As shown in Fig. 6, the diode conduction angle increases along with the input power. The resistance plot has a vertex around 30 mW, which is considered to be caused by the diode threshold voltage. When the input power is low, the diode is mostly off and presents relatively high resistance. As the input power increases, the effect of threshold voltage and the diode resistance decreases. In either case, the diode presents capacitive reactance.
Comparison of diode impedances between calculation using the closed-form equation and ADS simulation, and calculated conduction angles.
Parameters of HSMS 286 Schottky diode and circuit capacitors.
To validate the closed-form equation, the calculated results are compared with the results simulated by the ADS software. The simulation uses ideal components without package parasitic effects, and the Large Signal S Parameter (LSSP) simulation engine is applied to obtain the input impedances. The resistance values calculated with the closed-form equation are close to the simulated ones as shown in Fig. 6. The reactance difference between simulated and calculated results is considered to be caused by the difference between junction capacitance models, which substantially affect the diode reactance. The closed-form equation is accurate enough to build the preliminary rectifying circuit topology. It is important to provide a guideline for MW nonlinear rectifier designing rather than the circuit design based on random optimization, which usually takes a much longer time.
C) Diode efficiency
Power losses of a MW rectifier come from three parts: dielectric and conductor losses, radiation loss, and diode loss, in which diode loss usually plays a major role. The diode efficiency is defined as
$$\eta = \displaystyle{{P_c} \over {P_c + L_{R_s} + L_j}},$$
where P c is the DC output power, and L Rs and L j are the power losses on the diode series resistance and diode junction, respectively. According to Fig. 5, the DC output power, diode series resistance loss, and diode junction loss are defined as follows:
$$P_c = \displaystyle{{V_c^2} \over {R_L}},$$
$$L_{R_s} = \displaystyle{1 \over \pi} \left\{ {\int_{\pi - \theta _i/2}^{\pi + \theta _i/2} {\displaystyle{{{(V_I - V_F)}^2} \over {R_s}}d\theta + \int_{\pi + \theta _i/2}^{5\pi - \theta _i/2} {\displaystyle{{{(V_I - V_j)}^2} \over {R_s}}d\theta}}} \right\},$$
$$L_j = \displaystyle{1 \over \pi} \int_{\pi - \theta _i/2}^{\pi + \theta _i/2} {V_F\displaystyle{{(V_I - V_F)} \over {R_s}}d\theta}. $$
By substituting (22)–(24) into (21), we obtain the diode efficiency:
$$\eta = \displaystyle{{V_c^2} \over \matrix{(2R_L(V_F + V_c)^2/\pi R_s)(2\theta _i - 8\tan (\theta _i/2) \,+ \hfill \cr ((\theta _i + \sin \theta _i)/\cos ^2(\theta _i/2))) + (4\omega ^2C_j^2 R_sR_L \hfill \cr (V_F + V_c)^2/\pi \cos ^2(\theta _i/2))(\pi - (\theta _i/2) \,+ \hfill \cr (\sin \theta _i/2)) + (2V_FR_L(V_F + V_c)/\pi R_s) \hfill \cr (2\tan (\theta _i/2) - \theta _i) + V_c^2 \hfill}}. $$
To validate the closed-form equation on rectifying efficiency, the calculated results are compared with the simulated ones from the ADS software. Each circuit designed in the ADS was optimized to its maximum rectifying efficiency at the specified input MW power. The simulation uses ideal components without package parasitic effects and the Harmonic Balance (HB) simulation engine to obtain the rectifying efficiency. As shown in Fig. 7, the calculated rectifying efficiency agrees well with simulated results at 10 GHz. The maximum error in efficiency is 10%. The maximum rectifying efficiencies are close to each other, while there is a shift on the input MW power. However, the closed-form equation predicts the general efficiency of a voltage doubler rectifier with the specified diode at an arbitrary frequency. It is meaningful since it can be applied to diode selection and estimating the efficiency level before accurate designing.
Comparison of diode conversion efficiency calculated from the closed-form equation and simulated from the ADS.
III. RECTIFIER DESIGN
$$Z_{in} = Z_0\displaystyle{{Z_L + jZ_0\tan \theta} \over {Z_0 + jZ_L\tan \theta}}. $$
The topology of the proposed rectifier is shown in Fig. 8. The output DC filter is constituted by TL2 and C 2. Capacitor C 2 is regarded as a short circuit at MW frequency. The length of TL2 is half-wavelength at the fundamental frequency so as to present a short-circuit point “A” at this frequency and its harmonics. MW power is reflected back to the diode at point A. The relevant equation is shown in (26), in which Z 0 is the characteristic impedance of a transmission line, which is associated with its width; Z L is the load impedance of the line; θ is the electrical length of the line. Therefore, whatever Z 0 is, the Z in of TL2 is fixed at zero in this case. Z 0 is set to be 50 Ω in the preliminary design for TL2.
The topology of the designed X band voltage doubler rectifier.
TL4 is designed for conducting DC current. It is shorted by point A at MW frequency. Thus, its width and length has no contribution to the circuit impedance matching design at fundamental frequency.
TL3 is a segment of transmission line with a short-circuit ending (point A). Its characteristic impedance is set to be equal to TL4 to avoid a steep variation in microstrip line widths, which leads to power losses due to the electromagnetic radiation and reflection. Its length is calculated from equation (26). In this design, the equivalent input impedance of TL3 is set to be the conjugate of diode reactance. In Fig. 6, the diode impedance is 100.6 − j27.2 Ω at an input MW power of 120 mW. If the input impedance of TL3 is j27.2 Ω, the reactance of diode D1 is compensated and Z 2 in Fig. 8 has to be a pure resistance. TL1 is applied to compensate for the reactance of diode D2 as well. Consequently, Z IN is pure resistance.
Z INPUT is the target value of the impedance transformation. It is usually a pure resistance, for instance, 50 Ω. A quarter-wavelength microstrip line can be added to transform Z IN to Z INPUT by tuning its width directly if Z IN is pure resistance as well. Therefore, the advantage offered by the above procedures is to make it easier for the impedance matching design.
In this work, Z IN in Fig. 8 is supposed to be 50.3 Ω, which is matched with the signal source. Hence, it is no need to add any lines for impedance matching design in front of the diodes. Therefore, TL1 and TL3 constitute the impedance compensation network already.
The components in front of the diodes have no contribution to the impedance matching. TL5 was used for connecting C 1 and the diodes. Its length is less than one-tenth of the wavelength and can be seen as a lumped element, which is equivalent to a short circuit. Its characteristic impedance is set to be 50 Ω in the preliminary design. The reactance of C 1 is much less than 50 Ω and is neglected. TL6 is a microstrip line with a characteristic impedance of 50 Ω, which is used for connecting the source. Its length will not affect anything according to equation (26).
Agilent ADS simulations were performed to optimize the voltage doubler rectifier further. The finalized input impedances of TL1 and TL3 are 7.6 + j26.9 Ω and 9.5 + j29.0 Ω, respectively. This result coincides with the theoretical results (Table 3).
The supposed values of TL1–TL3
The harmonic power was monitored at the output port by probes in the ADS simulation. In Fig. 9, except for DC power, power at fundamental and harmonic frequencies is close to zero. The rectifier is able to significantly suppress the harmonics produced during rectifying.
DC and harmonic power at the output port of the designed circuit.
The voltage doubler rectifier is fabricated on a 1-mm F4B-2 substrate with relative dielectric constant 2.65 and loss tangent 0.005. Then, AVAGO HSMS-286C Schottky diodes and ATC 600S series capacitors are applied. Their parameters and capacitances are listed in Table 2. The shortest length of TL1 and TL3 is around 3 mm, which has been lengthened with a half-wavelength to avoid possible coupling between microstrip lines. Another advantage is to enhance the heat dissipation of the diode so as to improve the stability. For rectifiers at high power system, heat dissipation is necessary.
Because of the operating MW frequency, we took circuit radiation into consideration. Therefore, a metal cavity was applied to recycle the radiated power. It is similar to an antenna reflecting plate design. The height of the air layer determines the cavity's ability in terms of power recovery. The designed rectifier and its cavity are shown in Fig. 10. We introduced perfect conductive surfaces around the circuit in the ADS software to optimize the height of the air layer in the cavity. The simulated and measured results of the rectifying efficiency variation are shown in Fig. 11. Each circuit was optimized to its maximum efficiency by tuning the input power and DC load resistance at a specific height of the air layer. When the height of the air layer is 7 mm, the highest efficiency is achieved. A rectifier with a metal cavity offers several advantages, such as it prevents electrostatic breakdown, it is dust-proof, and it is moisture-proof.
The fabricated voltage doubler rectifier with a cavity.
The simulated and measured results of efficiency varying with air layer thickness ranging from 4 to 12 mm.
The fabricated circuit was measured with an Agilent E8267C MW vector signal generator. For comparative analysis, the measured DC voltages are compared with the ones calculated by the closed-form equation, as shown in Fig. 12. In this calculation, we use the efficiencies calculated in Fig. 7, and fix the load resistance on 486 Ω, which is equal to the measured optimal load resistance. The two plots have a similar trend.
The measured and calculated output DC voltage of the proposed rectifier with respect to the input power.
The measured efficiencies are shown in Fig. 13. The proposed circuit achieves its highest efficiency of 72% at 87 mW with a DC load resistance of 486 Ω. The ADS simulation was performed to obtain the efficiency of the rectifier in the cavity. Measured results are in good agreement with simulated ones.
Rectifier conversion efficiency by measurement and using the simulation software ADS. The load resistance is 486 Ω.
A conclusion is drawn according to the comparison of calculation, simulation and measurement. The efficiency closed-form equation is applied to predicting the optimal efficiency of a voltage doubler rectifier. Another advantage is to make diode selection based on the calculated optimal rectifying efficiency without long-time optimization in the ADS. The closed-form equation on impedance is helpful to build the preliminary circuit topology. The following optimization is quick due to the almost accurate preliminary circuit topology.
IV. CONCLUSION
A rectifier has been developed with a measured conversion efficiency of 72% at 10 GHz at an input power of 87 mW. Closed-form equations of diode impedance and conversion efficiency of a MW voltage doubler rectifier have been presented. Simulations in ADS have been performed to validate the closed-form equation. The impedance matching network of the proposed rectifier was built preliminarily based on the closed-form equation. A metal cavity has been added for recycling radiated MW power. The highest measured conversion efficiency coincides with the calculated one. The presented rectifier will be applied to a practical MW power transmission system. Moreover, an impedance compression network [Reference Xu and Ricketts31] may be combined with the proposed rectifier to be applied in a higher MW power transmission system.
ACKNOWLEDGEMENT
This work was supported in part by the China 973 program under Grant 2013CB328902, and the NSFC under Grant 61271074.
Feifei Tan earned her BS in Electronics Information Engineering from Sichuan University of China in 2011. She is currently working toward her Ph.D. in Communication and Information System in Sichuan University. Her main research interests include the design of microwave circuits and microwave power transmission system.
Changjun Liu earned his BS in Applied Physics from Hebei University of China in 1994, MS in Radio Physics in 1997, and Ph.D. in Biomedical Engineering in 2000 from Sichuan University, China. He has been a professor at the School of Electronics and Information Engineering, Sichuan University, China, since 2004. He was a postdoctoral student at Seoul National University, South Korea, from 2001 to 2002, and a visiting scholar at Ulm University, Germany, from 2006 to 2007. He was an outstanding reviewer for IEEE Transactions on Microwave Theory and Techniques from 2006 to 2010. Dr. Liu is focusing on microwave/radio frequency circuits, microwave wireless power transmission, and microwave power combining.
