Book contents
- Frontmatter
- Contents
- Preface
- Acknowledgments
- Part I Introduction
- Part II Combinational logic
- 3 Boolean algebra
- 4 CMOS logic circuits
- 5 Delay and power of CMOS circuits
- 6 Combinational logic design
- 7 VHDL descriptions of combinational logic
- 8 Combinational building blocks
- 9 Combinational examples
- Part III Arithmetic circuits
- Part IV Synchronous sequential logic
- Part V Practical design
- Part VI System design
- Part VII Asynchronous logic
- Part VIII Appendix: VHDL coding style and syntax guide
- References
- Index of VHDL design entities
- Subject index
8 - Combinational building blocks
from Part II - Combinational logic
Published online by Cambridge University Press: 01 February 2019
Book contents
- Frontmatter
- Contents
- Preface
- Acknowledgments
- Part I Introduction
- Part II Combinational logic
- 3 Boolean algebra
- 4 CMOS logic circuits
- 5 Delay and power of CMOS circuits
- 6 Combinational logic design
- 7 VHDL descriptions of combinational logic
- 8 Combinational building blocks
- 9 Combinational examples
- Part III Arithmetic circuits
- Part IV Synchronous sequential logic
- Part V Practical design
- Part VI System design
- Part VII Asynchronous logic
- Part VIII Appendix: VHDL coding style and syntax guide
- References
- Index of VHDL design entities
- Subject index
Summary
A relatively small number of modules, decoders, multiplexers, encoders, etc., are used repeatedly in digital designs. These building blocks are the idioms of modern digital design. Often, we design a module by composing a number of these building blocks to realize the desired function, rather than writing its truth table and directly synthesizing a logical implementation.
In the 1970s and 1980s most digital systems were built from small integrated circuits that each contained one of these building block functions. The popular 7400 series of TTL logic [106], for example, contained many multiplexers and decoders. During that period, the art of digital design largely consisted of selecting the right building blocks from the TTL databook and assembling them into modules. Today, with most logic implemented as ASICs or FPGAs, we are not constrained by what building blocks are available in the TTL databook. However, the basic building blocks are still quite useful elements from which to build a system.
MULTI-BIT NOTATION
Throughout this book we use bus notation in figures to denote multi-bit signals with a single line. For example, in Figure 8.1, we represent the eight-bit signal b7:0 with a single line. The diagonal slash across the signal indicates that this line represents a multi-bit signal. The number “8” below the slash indicates that the width of the bus is eight bits.
Single bits and subfields are selected from a multi-bit signal using diagonal connectors, as shown for bits b7 and b5, and the three-bit subfield b5:3. Each diagonal connector is labeled with the bits being selected. The bit selections may overlap – as is the case with b5 and b5:3. The subfield b5:3 is itself a multi-bit signal and is labeled accordingly – with a slash and the number “3.”
DECODERS
In general, a decoder converts symbols from one code to another. We have already seen an example of a binary to seven-segment decoder in Section 7.3. When used by itself, however, the term decoder means a binary to one-hot decoder. That converts a symbol from a binary code (each bit pattern represents a symbol) to a one-hot code (at most one bit can be high at a time and each bit represents a symbol). In Section 8.4 we will discuss encoders that reverse this process. That is, they are one-hot to binary decoders.
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- Digital Design Using VHDLA Systems Approach, pp. 157 - 198Publisher: Cambridge University PressPrint publication year: 2015
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