Published online by Cambridge University Press: 01 January 2026
The chapter focuses on the network and architecture layers of the design stack building up from device and circuit concepts introduced in Chapters 3 and 4. Architectural advantages like address-event representation stemming from neuromorphic models by leveraging spiking sparsity are discussed. Near-memory and in-memory architectures using CMOS implementations are first discussed followed by several emerging technologies, namely, correlated electron semiconductor-based devices, filamentary devices, organic devices, spintronic devices, and photonic neural networks.
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