With the evolution from 5G to 6G and the popularization of carrier aggregation technology, mobile terminal devices face challenges in miniaturizing multiplexers and handling concurrent signals across a wide-bandgap. This study proposes a numerical de-embedding design method. By precisely calculating and compensating for the parasitic loads, it achieves deterministic synthesis of matching networks. Based on this method, we designed and fabricated a monolithic integrated surface acoustic wave triplexer on a lithium tantalite on insulator (LTOI) substrate for dual-frequency GPS L1/L5 positioning and Bluetooth (BT) communication. To suppress a specific spurious mode on the LTOI substrate and improve the isolation, a notch inductor structure was embedded into the design. The monolithic integrated triplexer measures 2.5 mm × 2.0 mm × 0.6 mm after packaging. The insertion loss is less than 1.6 dB in both the L1 and L5 bands. In the BT band, the average loss within any 18 MHz range of the passband is below 2.5 dB. The return loss for all three channels is better than −10 dB, while the isolation between channels is maintained at ≈40 dB. The successful fabrication of this triplexer not only validates the design method but also demonstrates its potential for application in miniaturized wearable devices.

In this paper, we describe the design, layout, and performance of a 6-bit TTD (true time delay) chip operating over the entire band of 2–18 GHz. The 1.15 mm2 chip is implemented using TSMC foundry 65 nm technology. The least significant bit is 1 ps. The design is based on the concept of all-pass network with some modifications intended to reduce the number of unit cells. Thus, the first three bits are implemented in a single delay cell. A peaking buffer amplifier between bit 4 and bit 5 is used for impedance matching and partial compensation of the insertion loss slope. The rms delay error of the TTD is <1 ps over most of the frequency band and insertion loss is between 2.5 and 6.3 dB for all 64 states.